Commit c407570a by Richard Henderson Committed by Richard Henderson

ia64.c (rtx_needs_barrier): Handle POPCOUNT, UNSPEC_GETF_EXP; remove UNSPEC_POPCNT.

        * config/ia64/ia64.c (rtx_needs_barrier): Handle POPCOUNT,
        UNSPEC_GETF_EXP; remove UNSPEC_POPCNT.
        * config/ia64/ia64.md (UNSPEC_POPCNT): Remove.
        (ffsdi2): Use popcount instead of unspec.
        (popcountdi2): Rename from *popcnt.
        (ctzdi2, clzdi2, getf_exp_tf): New.

From-SVN: r62428
parent 4b3cf522
2003-02-04 Richard Henderson <rth@redhat.com>
* config/ia64/ia64.c (rtx_needs_barrier): Handle POPCOUNT,
UNSPEC_GETF_EXP; remove UNSPEC_POPCNT.
* config/ia64/ia64.md (UNSPEC_POPCNT): Remove.
(ffsdi2): Use popcount instead of unspec.
(popcountdi2): Rename from *popcnt.
(ctzdi2, clzdi2, getf_exp_tf): New.
2003-02-04 Kazu Hirata <kazu@cs.umass.edu> 2003-02-04 Kazu Hirata <kazu@cs.umass.edu>
* genconfig.c (main): Generate CC0_P. * genconfig.c (main): Generate CC0_P.
......
...@@ -5017,7 +5017,7 @@ rtx_needs_barrier (x, flags, pred) ...@@ -5017,7 +5017,7 @@ rtx_needs_barrier (x, flags, pred)
case NEG: case NOT: case SIGN_EXTEND: case ZERO_EXTEND: case NEG: case NOT: case SIGN_EXTEND: case ZERO_EXTEND:
case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: case FLOAT: case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: case FLOAT:
case FIX: case UNSIGNED_FLOAT: case UNSIGNED_FIX: case ABS: case FIX: case UNSIGNED_FLOAT: case UNSIGNED_FIX: case ABS:
case SQRT: case FFS: case SQRT: case FFS: case POPCOUNT:
need_barrier = rtx_needs_barrier (XEXP (x, 0), flags, pred); need_barrier = rtx_needs_barrier (XEXP (x, 0), flags, pred);
break; break;
...@@ -5053,10 +5053,7 @@ rtx_needs_barrier (x, flags, pred) ...@@ -5053,10 +5053,7 @@ rtx_needs_barrier (x, flags, pred)
case UNSPEC_FR_SPILL: case UNSPEC_FR_SPILL:
case UNSPEC_FR_RESTORE: case UNSPEC_FR_RESTORE:
case UNSPEC_POPCNT: case UNSPEC_GETF_EXP:
need_barrier = rtx_needs_barrier (XVECEXP (x, 0, 0), flags, pred);
break;
case UNSPEC_ADDP4: case UNSPEC_ADDP4:
need_barrier = rtx_needs_barrier (XVECEXP (x, 0, 0), flags, pred); need_barrier = rtx_needs_barrier (XVECEXP (x, 0, 0), flags, pred);
break; break;
......
...@@ -63,7 +63,7 @@ ...@@ -63,7 +63,7 @@
(UNSPEC_FR_RESTORE 13) (UNSPEC_FR_RESTORE 13)
(UNSPEC_FR_RECIP_APPROX 14) (UNSPEC_FR_RECIP_APPROX 14)
(UNSPEC_PRED_REL_MUTEX 15) (UNSPEC_PRED_REL_MUTEX 15)
(UNSPEC_POPCNT 16) (UNSPEC_GETF_EXP 16)
(UNSPEC_PIC_CALL 17) (UNSPEC_PIC_CALL 17)
(UNSPEC_MF 18) (UNSPEC_MF 18)
(UNSPEC_CMPXCHG_ACQ 19) (UNSPEC_CMPXCHG_ACQ 19)
...@@ -2301,7 +2301,7 @@ ...@@ -2301,7 +2301,7 @@
(set (match_dup 2) (plus:DI (match_dup 1) (const_int -1))) (set (match_dup 2) (plus:DI (match_dup 1) (const_int -1)))
(set (match_dup 5) (const_int 0)) (set (match_dup 5) (const_int 0))
(set (match_dup 3) (xor:DI (match_dup 1) (match_dup 2))) (set (match_dup 3) (xor:DI (match_dup 1) (match_dup 2)))
(set (match_dup 4) (unspec:DI [(match_dup 3)] UNSPEC_POPCNT)) (set (match_dup 4) (popcount:DI (match_dup 3)))
(set (match_operand:DI 0 "gr_register_operand" "") (set (match_operand:DI 0 "gr_register_operand" "")
(if_then_else:DI (ne (match_dup 6) (const_int 0)) (if_then_else:DI (ne (match_dup 6) (const_int 0))
(match_dup 5) (match_dup 4)))] (match_dup 5) (match_dup 4)))]
...@@ -2314,14 +2314,52 @@ ...@@ -2314,14 +2314,52 @@
operands[6] = gen_reg_rtx (BImode); operands[6] = gen_reg_rtx (BImode);
}) })
(define_insn "*popcnt" (define_expand "ctzdi2"
[(set (match_dup 2) (plus:DI (match_operand:DI 1 "gr_register_operand" "")
(const_int -1)))
(set (match_dup 3) (not:DI (match_dup 1)))
(set (match_dup 4) (and:DI (match_dup 2) (match_dup 3)))
(set (match_operand:DI 0 "gr_register_operand" "")
(popcount:DI (match_dup 4)))]
""
{
operands[2] = gen_reg_rtx (DImode);
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode);
})
;; ??? Ought to invent some unspecs for !INTEL_EXTENDED_IEEE_FORMAT.
;; Note the computation here is op0 = 63 - (exp - 0xffff).
(define_expand "clzdi2"
[(set (match_dup 2)
(unsigned_float:TF (match_operand:DI 1 "fr_register_operand" "")))
(set (match_dup 3)
(unspec:DI [(match_dup 2)] UNSPEC_GETF_EXP))
(set (match_dup 4) (const_int 65598))
(set (match_operand:DI 0 "gr_register_operand" "")
(minus:DI (match_dup 4) (match_dup 3)))]
"INTEL_EXTENDED_IEEE_FORMAT"
{
operands[2] = gen_reg_rtx (TFmode);
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode);
})
(define_insn "popcountdi2"
[(set (match_operand:DI 0 "gr_register_operand" "=r") [(set (match_operand:DI 0 "gr_register_operand" "=r")
(unspec:DI [(match_operand:DI 1 "gr_register_operand" "r")] (popcount:DI (match_operand:DI 1 "gr_register_operand" "r")))]
UNSPEC_POPCNT))]
"" ""
"popcnt %0 = %1" "popcnt %0 = %1"
[(set_attr "itanium_class" "mmmul")]) [(set_attr "itanium_class" "mmmul")])
(define_insn "*getf_exp_tf"
[(set (match_operand:DI 0 "gr_register_operand" "=r")
(unspec:DI [(match_operand:TF 1 "fr_register_operand" "f")]
UNSPEC_GETF_EXP))]
"INTEL_EXTENDED_IEEE_FORMAT"
"getf.exp %0 = %1"
[(set_attr "itanium_class" "frfr")])
(define_expand "divdi3" (define_expand "divdi3"
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(div:DI (match_operand:DI 1 "general_operand" "") (div:DI (match_operand:DI 1 "general_operand" "")
......
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