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riscv-gcc-1
Commit c3840092 by James E Wilson Committed by Jim Wilson
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Another patch for pending SB-1 DFA scheduler. 

	* config/mips/mips.md (type): Split move into arith and fmove.  Split
	hilo into mthilo and mfhilo.  Add trap.  Delete icmp.  Fix all uses.
	* config/mips/5400.md (ir_vr54_hilo, ir_vr54_arith, ir_vr54_fabs):
	Likewise.
	* config/mips/5500.md (ir_vr55_hilo, ir_vr55_arith, ir_vr55_fabs):
	Likewise.
	* config/mips/7000.md (rm7_int_other, rm7_mthilo, rm7_mfhilo,
	rm7_fp_quick): Likewise.
	* config/mips/9000.md (rm9k_int, rm9k_mfhilo, rm9k_mthilo,
	rm9k_fquick): Likewise.
	* config/mips/sr71k.md (ir_sr70_hilo, ir_sr70_arith, ir_sr70_fabs):
	Likewise.
	(ir_sr70_icmp): Delete.

From-SVN: r79650
parent a2982c1b
Showing with 71 additions and 62 deletions
gcc/ChangeLog
2004-03-18 James E Wilson <wilson@specifixinc.com>
* config/mips/mips.md (type): Split move into arith and fmove. Split
hilo into mthilo and mfhilo. Add trap. Delete icmp. Fix all uses.
* config/mips/5400.md (ir_vr54_hilo, ir_vr54_arith, ir_vr54_fabs):
Likewise.
* config/mips/5500.md (ir_vr55_hilo, ir_vr55_arith, ir_vr55_fabs):
Likewise.
* config/mips/7000.md (rm7_int_other, rm7_mthilo, rm7_mfhilo,
rm7_fp_quick): Likewise.
* config/mips/9000.md (rm9k_int, rm9k_mfhilo, rm9k_mthilo,
rm9k_fquick): Likewise.
* config/mips/sr71k.md (ir_sr70_hilo, ir_sr70_arith, ir_sr70_fabs):
Likewise.
(ir_sr70_icmp): Delete.
2004-03-18 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* tree.h (TREE_CHECK2, TREE_CHECK3, TREE_CHECK5): New macros.
......
gcc/config/mips/5400.md
......@@ -55,12 +55,12 @@
(define_insn_reservation "ir_vr54_hilo" 1
(and (eq_attr "cpu" "r5400")
(eq_attr "type" "hilo"))
(eq_attr "type" "mthilo,mfhilo"))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_arith" 1
(and (eq_attr "cpu" "r5400")
(eq_attr "type" "move,arith,shift,slt,clz,const,icmp,nop"))
(eq_attr "type" "arith,shift,slt,clz,const,nop,trap"))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_imul_si" 3
......@@ -135,7 +135,7 @@
(define_insn_reservation "ir_vr54_fabs" 2
(and (eq_attr "cpu" "r5400")
(eq_attr "type" "fabs,fneg"))
(eq_attr "type" "fabs,fneg,fmove"))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_fcmp" 2
......
gcc/config/mips/5500.md
......@@ -51,12 +51,12 @@
(define_insn_reservation "ir_vr55_hilo" 2
(and (eq_attr "cpu" "r5500")
(eq_attr "type" "hilo"))
(eq_attr "type" "mthilo,mfhilo"))
"vr55_dp0|vr55_dp1")
(define_insn_reservation "ir_vr55_arith" 1
(and (eq_attr "cpu" "r5500")
(eq_attr "type" "move,arith,shift,slt,clz,const,icmp,nop"))
(eq_attr "type" "arith,shift,slt,clz,const,nop,trap"))
"vr55_dp0|vr55_dp1")
(define_insn_reservation "ir_vr55_imul_si" 3
......@@ -133,7 +133,7 @@
(define_insn_reservation "ir_vr55_fabs" 2
(and (eq_attr "cpu" "r5500")
(eq_attr "type" "fabs,fneg"))
(eq_attr "type" "fabs,fneg,fmove"))
"vr55_fp")
(define_insn_reservation "ir_vr55_fcmp" 2
......
gcc/config/mips/7000.md
......@@ -88,7 +88,7 @@
(define_insn_reservation "rm7_int_other" 1
(and (eq_attr "cpu" "r7000")
(eq_attr "type" "arith,shift,slt,clz,const,move,condmove,icmp,nop"))
(eq_attr "type" "arith,shift,slt,clz,const,condmove,nop,trap"))
"rm7_iaddsub")
(define_insn_reservation "rm7_ld" 2 (and (eq_attr "cpu" "r7000")
......@@ -132,14 +132,12 @@
;; Move to/from HI/LO.
(define_insn_reservation "rm7_mthilo" 3
(and (eq_attr "cpu" "r7000")
(and (eq_attr "type" "hilo")
(match_operand 0 "hilo_operand" "")))
(eq_attr "type" "mthilo"))
"rm7_impydiv")
(define_insn_reservation "rm7_mfhilo" 1
(and (eq_attr "cpu" "r7000")
(and (eq_attr "type" "hilo")
(not (match_operand 0 "hilo_operand" ""))))
(eq_attr "type" "mfhilo"))
"rm7_impydiv")
;; Move to/from fp coprocessor.
......@@ -156,7 +154,7 @@
;;
(define_insn_reservation "rm7_fp_quick" 4
(and (eq_attr "cpu" "r7000")
(eq_attr "type" "fneg,fcmp,fabs"))
(eq_attr "type" "fneg,fcmp,fabs,fmove"))
"rm7_fpadd")
(define_insn_reservation "rm7_fp_other" 4
......
gcc/config/mips/9000.md
......@@ -52,7 +52,7 @@
(define_insn_reservation "rm9k_int" 1
(and (eq_attr "cpu" "r9000")
(eq_attr "type" "move,arith,shift,slt,clz,const,icmp,nop"))
(eq_attr "type" "arith,shift,slt,clz,const,nop,trap"))
"rm9k_any1 | rm9k_any2")
(define_insn_reservation "rm9k_int_cmove" 2
......@@ -88,14 +88,12 @@
(define_insn_reservation "rm9k_mfhilo" 1
(and (eq_attr "cpu" "r9000")
(and (eq_attr "type" "hilo")
(not (match_operand 0 "hilo_operand" ""))))
(eq_attr "type" "mfhilo"))
"rm9k_f_int")
(define_insn_reservation "rm9k_mthilo" 5
(and (eq_attr "cpu" "r9000")
(and (eq_attr "type" "hilo")
(match_operand 0 "hilo_operand" "")))
(eq_attr "type" "mthilo"))
"rm9k_f_int")
(define_insn_reservation "rm9k_xfer" 2
......@@ -105,7 +103,7 @@
(define_insn_reservation "rm9k_fquick" 2
(and (eq_attr "cpu" "r9000")
(eq_attr "type" "fabs,fneg,fcmp"))
(eq_attr "type" "fabs,fneg,fcmp,fmove"))
"rm9k_f_float")
(define_insn_reservation "rm9k_fcmove" 2
......
gcc/config/mips/sr71k.md
......@@ -195,13 +195,13 @@
(define_insn_reservation "ir_sr70_hilo"
1
(and (eq_attr "cpu" "sr71000")
(eq_attr "type" "hilo"))
(eq_attr "type" "mthilo,mfhilo"))
"ri_insns")
(define_insn_reservation "ir_sr70_arith"
1
(and (eq_attr "cpu" "sr71000")
(eq_attr "type" "move,arith,shift,slt,clz,const"))
(eq_attr "type" "arith,shift,slt,clz,const,trap"))
"ri_insns")
;; emulate repeat (dispatch stall) by spending extra cycle(s) in
......@@ -236,12 +236,6 @@
(eq_attr "mode" "DI")))
"ri_alux,ipu_alux,(ipu_macc_iter*70)")
(define_insn_reservation "ir_sr70_icmp"
1
(and (eq_attr "cpu" "sr71000")
(eq_attr "type" "icmp"))
"ri_insns")
;; extra reservations of fpu_fpu are for repeat latency
(define_insn_reservation "ir_sr70_fadd_sf"
8
......@@ -298,7 +292,7 @@
(define_insn_reservation "ir_sr70_fabs"
4
(and (eq_attr "cpu" "sr71000")
(eq_attr "type" "fabs,fneg"))
(eq_attr "type" "fabs,fneg,fmove"))
"rf_insn,fpu_fpu")
(define_insn_reservation "ir_sr70_fcmp"
......
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