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riscv-gcc-1
Commit c3499f00 by Gavin Koch Committed by Jim Wilson
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Patch from Gavin to fix mips16 prologue/epilogue bugs. 

	* mips/mips.c (mips_expand_prologue,mips_expand_epilogue):
	Change mode of registers used to add/sub from
	hard_frame_pointer_rtx from word_mode to Pmode.

From-SVN: r17511
parent 56841f01
Showing with 9 additions and 3 deletions
gcc/ChangeLog
Tue Jan 27 17:21:09 1998 Gavin Koch (gavin@cygnus.com)
* mips/mips.c (mips_expand_prologue,mips_expand_epilogue):
Change mode of registers used to add/sub from
hard_frame_pointer_rtx from word_mode to Pmode.
Tue Jan 27 11:02:04 1998 Nick Clifton <nickc@cygnus.com>
* v850.h (ASM_OUTPUT_ALIGNED_BSS): Use
......@@ -174,7 +180,7 @@ Fri Jan 23 00:27:23 1998 John Carr <jfc@mit.edu>
* toplev.c (get_run_time): Call sysconf(_SC_CLK_TCK), when available,
to get clock rate.
Fri Jan 23 00:19:36 1998 Gavin Kock (gavin@cygnus.com)
Fri Jan 23 00:19:36 1998 Gavin Koch (gavin@cygnus.com)
* mips.md (muldi3_internal2): Reverse test for TARGET_MIPS16.
......
gcc/config/mips/mips.c
......@@ -6502,7 +6502,7 @@ mips_expand_prologue ()
if (!frame_pointer_needed)
abort ();
reg_rtx = gen_rtx (REG, word_mode, 3);
reg_rtx = gen_rtx (REG, Pmode, 3);
emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
emit_move_insn (reg_rtx, tsize_rtx);
if (TARGET_64BIT)
......@@ -6722,7 +6722,7 @@ mips_expand_epilogue ()
add a register to $sp. */
if (orig_tsize > 32767)
{
rtx g6_rtx = gen_rtx (REG, word_mode, GP_REG_FIRST + 6);
rtx g6_rtx = gen_rtx (REG, Pmode, GP_REG_FIRST + 6);
emit_move_insn (g6_rtx, GEN_INT (tsize));
if (TARGET_LONG64)
......
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