Commit c2b640a7 by Andrew Stubbs Committed by Andrew Stubbs

arm.c (struct four_ints): New type.

2011-08-26  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/arm/arm.c (struct four_ints): New type.
	(count_insns_for_constant): Delete function.
	(find_best_start): Delete function.
	(optimal_immediate_sequence): New function.
	(optimal_immediate_sequence_1): New function.
	(arm_gen_constant): Move constant splitting code to
	optimal_immediate_sequence.
	Rewrite constant negation/invertion code.

	gcc/testsuite/
	* gcc.target/arm/thumb2-replicated-constant1.c: New file.
	* gcc.target/arm/thumb2-replicated-constant2.c: New file.
	* gcc.target/arm/thumb2-replicated-constant3.c: New file.
	* gcc.target/arm/thumb2-replicated-constant4.c: New file.

2011-08-26  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/arm/arm-protos.h (const_ok_for_op): Add prototype.
	* config/arm/arm.c (const_ok_for_op): Add support for addw/subw.
	Remove prototype. Remove static function type.
	* config/arm/arm.md (*arm_addsi3): Add addw/subw support.
	Add arch attribute.
	* config/arm/constraints.md (Pj, PJ): New constraints.

From-SVN: r178099
parent 58a2bda0
2011-08-26 Andrew Stubbs <ams@codesourcery.com>
* config/arm/arm.c (struct four_ints): New type.
(count_insns_for_constant): Delete function.
(find_best_start): Delete function.
(optimal_immediate_sequence): New function.
(optimal_immediate_sequence_1): New function.
(arm_gen_constant): Move constant splitting code to
optimal_immediate_sequence.
Rewrite constant negation/invertion code.
2011-08-26 Andrew Stubbs <ams@codesourcery.com>
* config/arm/arm-protos.h (const_ok_for_op): Add prototype.
* config/arm/arm.c (const_ok_for_op): Add support for addw/subw.
Remove prototype. Remove static function type.
* config/arm/arm.md (*arm_addsi3): Add addw/subw support.
Add arch attribute.
* config/arm/constraints.md (Pj, PJ): New constraints.
2011-08-26 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/cortex-a9.md ("cortex_a9_mult_long"): New.
......
......@@ -47,6 +47,7 @@ extern bool arm_vector_mode_supported_p (enum machine_mode);
extern bool arm_small_register_classes_for_mode_p (enum machine_mode);
extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode);
extern int const_ok_for_arm (HOST_WIDE_INT);
extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx,
HOST_WIDE_INT, rtx, rtx, int);
extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *, rtx *);
......
......@@ -708,21 +708,24 @@
;; (plus (reg rN) (reg sp)) into (reg rN). In this case reload will
;; put the duplicated register first, and not try the commutative version.
(define_insn_and_split "*arm_addsi3"
[(set (match_operand:SI 0 "s_register_operand" "=r, k,r,r, k,r")
(plus:SI (match_operand:SI 1 "s_register_operand" "%rk,k,r,rk,k,rk")
(match_operand:SI 2 "reg_or_int_operand" "rI,rI,k,L, L,?n")))]
[(set (match_operand:SI 0 "s_register_operand" "=r, k,r,r, k, r, k,r, k, r")
(plus:SI (match_operand:SI 1 "s_register_operand" "%rk,k,r,rk,k, rk,k,rk,k, rk")
(match_operand:SI 2 "reg_or_int_operand" "rI,rI,k,Pj,Pj,L, L,PJ,PJ,?n")))]
"TARGET_32BIT"
"@
add%?\\t%0, %1, %2
add%?\\t%0, %1, %2
add%?\\t%0, %2, %1
addw%?\\t%0, %1, %2
addw%?\\t%0, %1, %2
sub%?\\t%0, %1, #%n2
sub%?\\t%0, %1, #%n2
subw%?\\t%0, %1, #%n2
subw%?\\t%0, %1, #%n2
#"
"TARGET_32BIT
&& GET_CODE (operands[2]) == CONST_INT
&& !(const_ok_for_arm (INTVAL (operands[2]))
|| const_ok_for_arm (-INTVAL (operands[2])))
&& !const_ok_for_op (INTVAL (operands[2]), PLUS)
&& (reload_completed || !arm_eliminable_register (operands[1]))"
[(clobber (const_int 0))]
"
......@@ -731,8 +734,9 @@
operands[1], 0);
DONE;
"
[(set_attr "length" "4,4,4,4,4,16")
(set_attr "predicable" "yes")]
[(set_attr "length" "4,4,4,4,4,4,4,4,4,16")
(set_attr "predicable" "yes")
(set_attr "arch" "*,*,*,t2,t2,*,*,t2,t2,*")]
)
(define_insn_and_split "*thumb1_addsi3"
......
......@@ -31,7 +31,7 @@
;; The following multi-letter normal constraints have been used:
;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dz
;; in Thumb-1 state: Pa, Pb, Pc, Pd
;; in Thumb-2 state: Ps, Pt, Pu, Pv, Pw, Px, Py
;; in Thumb-2 state: Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py
;; The following memory constraints have been used:
;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
......@@ -75,6 +75,18 @@
(and (match_code "const_int")
(match_test "(ival & 0xffff0000) == 0")))))
(define_constraint "Pj"
"@internal A 12-bit constant suitable for an ADDW or SUBW instruction. (Thumb-2)"
(and (match_code "const_int")
(and (match_test "TARGET_THUMB2")
(match_test "(ival & 0xfffff000) == 0"))))
(define_constraint "PJ"
"@internal A constant that satisfies the Pj constrant if negated."
(and (match_code "const_int")
(and (match_test "TARGET_THUMB2")
(match_test "((-ival) & 0xfffff000) == 0"))))
(define_register_constraint "k" "STACK_REG"
"@internal The stack register.")
......
2011-08-26 Andrew Stubbs <ams@codesourcery.com>
* gcc.target/arm/thumb2-replicated-constant1.c: New file.
* gcc.target/arm/thumb2-replicated-constant2.c: New file.
* gcc.target/arm/thumb2-replicated-constant3.c: New file.
* gcc.target/arm/thumb2-replicated-constant4.c: New file.
2011-08-25 Mikael Morin <mikael.morin@gcc.gnu.org>
PR fortran/50050
......
/* Ensure simple replicated constant immediates work. */
/* { dg-options "-mthumb -O2" } */
/* { dg-require-effective-target arm_thumb2_ok } */
int
foo1 (int a)
{
return a + 0xfefefefe;
}
/* { dg-final { scan-assembler "add.*#-16843010" } } */
int
foo2 (int a)
{
return a - 0xab00ab00;
}
/* { dg-final { scan-assembler "sub.*#-1426019584" } } */
int
foo3 (int a)
{
return a & 0x00cd00cd;
}
/* { dg-final { scan-assembler "and.*#13435085" } } */
/* Ensure split constants can use replicated patterns. */
/* { dg-options "-mthumb -O2" } */
/* { dg-require-effective-target arm_thumb2_ok } */
int
foo1 (int a)
{
return a + 0xfe00fe01;
}
/* { dg-final { scan-assembler "add.*#-33489408" } } */
/* { dg-final { scan-assembler "add.*#1" } } */
int
foo2 (int a)
{
return a + 0xdd01dd00;
}
/* { dg-final { scan-assembler "add.*#-587145984" } } */
/* { dg-final { scan-assembler "add.*#65536" } } */
int
foo3 (int a)
{
return a + 0x00443344;
}
/* { dg-final { scan-assembler "add.*#4456516" } } */
/* { dg-final { scan-assembler "add.*#13056" } } */
int
foo4 (int a)
{
return a + 0x77330033;
}
/* { dg-final { scan-assembler "add.*#1996488704" } } */
/* { dg-final { scan-assembler "add.*#3342387" } } */
int
foo5 (int a)
{
return a + 0x11221122;
}
/* { dg-final { scan-assembler "add.*#285217024" } } */
/* { dg-final { scan-assembler "add.*#2228258" } } */
int
foo6 (int a)
{
return a + 0x66666677;
}
/* { dg-final { scan-assembler "add.*#1717986918" } } */
/* { dg-final { scan-assembler "add.*#17" } } */
int
foo7 (int a)
{
return a + 0x99888888;
}
/* { dg-final { scan-assembler "add.*#-2004318072" } } */
/* { dg-final { scan-assembler "add.*#285212672" } } */
int
foo8 (int a)
{
return a + 0xdddddfff;
}
/* { dg-final { scan-assembler "add.*#-572662307" } } */
/* { dg-final { scan-assembler "addw.*#546" } } */
/* Ensure negated/inverted replicated constant immediates work. */
/* { dg-options "-mthumb -O2" } */
/* { dg-require-effective-target arm_thumb2_ok } */
int
foo1 (int a)
{
return a | 0xffffff00;
}
/* { dg-final { scan-assembler "orn.*#255" } } */
int
foo2 (int a)
{
return a & 0xffeeffee;
}
/* { dg-final { scan-assembler "bic.*#1114129" } } */
int
foo3 (int a)
{
return a & 0xaaaaaa00;
}
/* { dg-final { scan-assembler "and.*#-1431655766" } } */
/* { dg-final { scan-assembler "bic.*#170" } } */
/* Ensure replicated constants don't make things worse. */
/* { dg-options "-mthumb -O2" } */
/* { dg-require-effective-target arm_thumb2_ok } */
int
foo1 (int a)
{
/* It might be tempting to use 0x01000100, but it wouldn't help. */
return a + 0x01f001e0;
}
/* { dg-final { scan-assembler "add.*#32505856" } } */
/* { dg-final { scan-assembler "add.*#480" } } */
int
foo2 (int a)
{
return a + 0x0f100e10;
}
/* { dg-final { scan-assembler "add.*#252706816" } } */
/* { dg-final { scan-assembler "add.*#3600" } } */
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