constraints.md (NEGint4): New constraint.

        * config/rx/constraints.md (NEGint4): New constraint.
        * config/rx/rx.md (attr cc): Add set_zsc.
        (cbranchsf4): Only test for -fnon-call-exceptions if cfun has been
        initialised.
        (cmpsf): Likewise.
        (call_internal): Clobber the cc0 register.
        (call_value_internal): Likewise.
        (cstoresi4): Likewise.
        (movsieq): Likewise.
        (movsine): Likewise.
        (addsi3): Add alternative to handle small negative constants.
        (sunsi3): Likewise.
        (addsi3): Do not set the O bit in the cc0 register.
        (adddi3): Likewise.
        (subsi3): Likewise.
        (subdi3): Likewise.
        (andsi3): Reorder alternatives to prefer shorter forms.
        (mulsi3): Likewise.
        (iorsi3): Likewise.
        (negsi2): Note that the cc0 flags are set.
        (rotlsi3): Note that only the Z and S bits are set in cc0.
        (lshrsi3): Likewise.
        (ashlsi3): Likewise.
        (subsf3): Use %Q for the MEM operand.
        (fix_truncsfsi2): Likewise.
        (floatsisf2): Likewise.
        (bitset): Remove early clobber from destination.
        (bitset_in_memory): Likewise.
        (lrintsf2): Clobber the cc0 register.
        * config/rx/rx.c (rx_notice_update_cc):
        Handle CC_SET_ZSC.
        (rx_print_operand): Handle %N.

From-SVN: r160846

gcc/ChangeLog

+2010-06-16  Nick Clifton  <nickc@redhat.com>
+
+	* config/rx/constraints.md (NEGint4): New constraint.
+	* config/rx/rx.md (attr cc): Add set_zsc.
+	(cbranchsf4): Only test for -fnon-call-exceptions if cfun has been
+	initialised.
+	(cmpsf): Likewise.
+	(call_internal): Clobber the cc0 register.
+	(call_value_internal): Likewise.
+	(cstoresi4): Likewise.
+	(movsieq): Likewise.
+	(movsine): Likewise.
+	(addsi3): Add alternative to handle small negative constants.
+	(sunsi3): Likewise.
+	(addsi3): Do not set the O bit in the cc0 register.
+	(adddi3): Likewise.
+	(subsi3): Likewise.
+	(subdi3): Likewise.
+	(andsi3): Reorder alternatives to prefer shorter forms.
+	(mulsi3): Likewise.
+	(iorsi3): Likewise.
+	(negsi2): Note that the cc0 flags are set.
+	(rotlsi3): Note that only the Z and S bits are set in cc0.
+	(lshrsi3): Likewise.
+	(ashlsi3): Likewise.
+	(subsf3): Use %Q for the MEM operand.
+	(fix_truncsfsi2): Likewise.
+	(floatsisf2): Likewise.
+	(bitset): Remove early clobber from destination.
+	(bitset_in_memory): Likewise.
+	(lrintsf2): Clobber the cc0 register.
+	* config/rx/rx.c (rx_notice_update_cc):
+	Handle CC_SET_ZSC.
+	(rx_print_operand): Handle %N.
+
 2010-06-16  Jan Hubicka  <jh@suse.cz>
 
 	* df-core.c (df_compact_blocks): Free problem_temps vector.

gcc/config/rx/constraints.md

@@ -63,6 +63,13 @@
   )
 )
 
+(define_constraint "NEGint4"
+  "@internal An signed 4-bit negative immediate value"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, -15, -1)")
+  )
+)
+
 ;; This is used in arithmetic and logic instructions for
 ;; a source operand that lies in memory and which satisfies
 ;; rx_restricted_memory_address().

gcc/config/rx/rx.c

@@ -484,6 +484,12 @@ rx_print_operand (FILE * file, rtx op, int letter)
 	}
       break;
 
+    case 'N':
+      gcc_assert (CONST_INT_P (op));
+      fprintf (file, "#");
+      rx_print_integer (file, - INTVAL (op));
+      break;
+
     case 'Q':
       if (MEM_P (op))
 	{
@@ -1667,7 +1673,7 @@ rx_notice_update_cc (rtx body, rtx insn)
     case CC_SET_ZSOC:
       /* The insn sets all the condition code bits.  */
       CC_STATUS_INIT;
-      cc_status.value1 = SET_SRC (body);
+      cc_status.value1 = SET_DEST (body);
       break;
     case CC_SET_ZSO:
       /* Insn sets the Z,S and O flags, but not the C flag.  */
@@ -1680,6 +1686,12 @@ rx_notice_update_cc (rtx body, rtx insn)
 	 bits being set here.  See gcc.c-torture/execute/20041210-1.c
 	 for an example of this in action.  */
       break;
+    case CC_SET_ZSC:
+      /* Insn sets the Z,S and C flags, but not the O flag.  */
+      CC_STATUS_INIT;
+      cc_status.flags |= CC_NO_OVERFLOW;
+      /* See comment above regarding cc_status.value1.  */
+      break;
     case CC_SET_ZS:
       /* Insn sets the Z and S flags, but not the O or C flags.  */
       CC_STATUS_INIT;