Commit c228001d by Jeff Law

pa.md (movdf const_double): Fix lengths.

        * pa.md (movdf const_double): Fix lengths.
        (floatsisf patterns): Likewise.
        (floatsidf patterns): Likewise.

From-SVN: r3042
parent 7c522d59
......@@ -1091,6 +1091,8 @@
;; This pattern forces (set (reg:DF ...) (const_double ...))
;; to be reloaded by putting the constant into memory.
;; It must come before the more general movdf pattern.
;; In the 3rd alternative case -- we know we will not be using a
;; general register, so we can be sure length is just 1.
(define_insn ""
[(set (match_operand:DF 0 "general_operand" "=?r,r,fx")
(match_operand:DF 1 "" "?E,G,m"))]
......@@ -1108,7 +1110,7 @@
}
}"
[(set_attr "type" "load,move,fpload")
(set_attr "length" "3,2,3")])
(set_attr "length" "3,2,1")])
(define_expand "movdf"
[(set (match_operand:DF 0 "general_operand" "")
......@@ -1443,40 +1445,48 @@
;; This pattern forces (set (reg:SF ...) (float:SF (const_int ...)))
;; to be reloaded by putting the constant into memory.
;; It must come before the more general floatsisf2 pattern.
;; Note length will always be 2 since we know we are loading
;; operand 1 from memory and the target is a FP register.
(define_insn ""
[(set (match_operand:SF 0 "general_operand" "=fx")
(float:SF (match_operand:SI 1 "const_int_operand" "m")))]
""
"* return output_floatsisf2 (operands);"
[(set_attr "type" "fpalu")
(set_attr "length" "3")])
(set_attr "length" "2")])
;; Note length will always be 1 since we only allow FP registers
;; for the source and target.
(define_insn "floatsisf2"
[(set (match_operand:SF 0 "general_operand" "=fx")
(float:SF (match_operand:SI 1 "register_operand" "fx")))]
""
"* return output_floatsisf2 (operands);"
[(set_attr "type" "fpalu")
(set_attr "length" "3")])
(set_attr "length" "1")])
;; This pattern forces (set (reg:DF ...) (float:DF (const_int ...)))
;; to be reloaded by putting the constant into memory.
;; It must come before the more general floatsidf2 pattern.
;; Note length will always be 2 since we know we are loading
;; operand 1 from memory and the target is a FP register.
(define_insn ""
[(set (match_operand:DF 0 "general_operand" "=fx")
(float:DF (match_operand:SI 1 "const_int_operand" "m")))]
""
"* return output_floatsidf2 (operands);"
[(set_attr "type" "fpalu")
(set_attr "length" "3")])
(set_attr "length" "2")])
;; Note length will always be 1 since we only allow FP registers
;; for the source and target.
(define_insn "floatsidf2"
[(set (match_operand:DF 0 "general_operand" "=fx")
(float:DF (match_operand:SI 1 "register_operand" "fx")))]
""
"* return output_floatsidf2 (operands);"
[(set_attr "type" "fpalu")
(set_attr "length" "3")])
(set_attr "length" "1")])
;; Convert a float to an actual integer.
;; Truncation is performed as part of the conversion.
......
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