rs6000.h (UNITS_PER_WORD): Revert to !TARGET_POWERPC64.

        * config/rs6000/rs6000.h (UNITS_PER_WORD): Revert to
        !TARGET_POWERPC64.
        (UNITS_PER_GPR_WORD): Delete.
        (HARD_REGNO_NREGS): Revert to UNITS_PER_WORD.
        (HARD_REGNO_MODE_OK): Same.
        (CLASS_MAX_NREGS): Same.

From-SVN: r73060

gcc/ChangeLog

+2003-10-29  David Edelsohn  <edelsohn@gnu.org>
+
+	* config/rs6000/rs6000.h (UNITS_PER_WORD): Revert to
+	!TARGET_POWERPC64.
+	(UNITS_PER_GPR_WORD): Delete.
+	(HARD_REGNO_NREGS): Revert to UNITS_PER_WORD.
+	(HARD_REGNO_MODE_OK): Same.
+	(CLASS_MAX_NREGS): Same.
+
 2003-10-29  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	* pa.h (ASM_COMMENT_START): Define.

gcc/config/rs6000/rs6000.h

@@ -625,7 +625,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
 #define MAX_BITS_PER_WORD 64
 
 /* Width of a word, in units (bytes).  */
-#define UNITS_PER_WORD (TARGET_32BIT ? 4 : 8)
+#define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8)
 #ifdef IN_LIBGCC2
 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
 #else
@@ -988,8 +988,6 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
    POWER and PowerPC GPRs hold 32 bits worth;
    PowerPC64 GPRs and FPRs point register holds 64 bits worth.  */
 
-#define UNITS_PER_GPR_WORD (! TARGET_POWERPC64 ? 4 : 8)
-
 #define HARD_REGNO_NREGS(REGNO, MODE)					\
   (FP_REGNO_P (REGNO)							\
    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
@@ -997,7 +995,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_SPE_WORD - 1) / UNITS_PER_SPE_WORD) \
    : ALTIVEC_REGNO_P (REGNO)						\
    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_ALTIVEC_WORD - 1) / UNITS_PER_ALTIVEC_WORD) \
-   : ((GET_MODE_SIZE (MODE) + UNITS_PER_GPR_WORD - 1) / UNITS_PER_GPR_WORD))
+   : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
 
 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)	\
   ((TARGET_32BIT && TARGET_POWERPC64			\
@@ -1042,7 +1040,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
    : SPE_SIMD_REGNO_P (REGNO) && TARGET_SPE && SPE_VECTOR_MODE (MODE) ? 1 \
    : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC		\
    : XER_REGNO_P (REGNO) ? (MODE) == PSImode				\
-   : GET_MODE_SIZE (MODE) <= UNITS_PER_GPR_WORD)
+   : GET_MODE_SIZE (MODE) <= UNITS_PER_WORD)
 
 /* Value is 1 if it is a good idea to tie two pseudo registers
    when one has mode MODE1 and one has mode MODE2.
@@ -1465,7 +1463,7 @@ enum reg_class
 #define CLASS_MAX_NREGS(CLASS, MODE)					\
  (((CLASS) == FLOAT_REGS) 						\
   ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
-  : ((GET_MODE_SIZE (MODE) + UNITS_PER_GPR_WORD - 1) / UNITS_PER_GPR_WORD))
+  : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
 
 
 /* Return a class of registers that cannot change FROM mode to TO mode.  */