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riscv-gcc-1
Commit c141e499 by Jan Hubicka Committed by Jan Hubicka
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re PR target/27869 ("-O -fregmove" handles SSE scalar instructions incorrectly) 


	PR target/27869
	* config/i386/sse.md
	(sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
	(sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
	(sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
	(sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.

From-SVN: r123682
parent b1bdab7e
Showing with 13 additions and 56 deletions
gcc/ChangeLog
2007-04-09 Jan Hubicka <jh@suse.cz>
PR target/27869
* config/i386/sse.md
(sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
(sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
(sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
(sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.
2007-04-09 Jan Hubicka <jh@suse.cz>
* tree-ssa-ccp (maybe_fold_offset_to_component_ref): Recurse into
multiple fields of union.
......
gcc/config/i386/sse.md
......@@ -351,7 +351,7 @@
(define_insn "sse_vmaddv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(plus:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(plus:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
......@@ -407,7 +407,7 @@
(define_insn "sse_vmmulv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(mult:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(mult:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
......@@ -539,19 +539,6 @@
[(set_attr "type" "sse")
(set_attr "mode" "V4SF")])
(define_insn "*sse_vmsmaxv4sf3_finite"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(smax:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE && flag_finite_math_only
&& ix86_binary_operator_ok (SMAX, V4SFmode, operands)"
"maxss\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")
(set_attr "mode" "SF")])
(define_insn "sse_vmsmaxv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
......@@ -594,19 +581,6 @@
[(set_attr "type" "sse")
(set_attr "mode" "V4SF")])
(define_insn "*sse_vmsminv4sf3_finite"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(smin:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE && flag_finite_math_only
&& ix86_binary_operator_ok (SMIN, V4SFmode, operands)"
"minss\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")
(set_attr "mode" "SF")])
(define_insn "sse_vmsminv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
......@@ -1481,7 +1455,7 @@
(define_insn "sse2_vmaddv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(plus:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(plus:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
......@@ -1537,7 +1511,7 @@
(define_insn "sse2_vmmulv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(mult:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(mult:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
......@@ -1627,19 +1601,6 @@
[(set_attr "type" "sseadd")
(set_attr "mode" "V2DF")])
(define_insn "*sse2_vmsmaxv2df3_finite"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(smax:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE2 && flag_finite_math_only
&& ix86_binary_operator_ok (SMAX, V2DFmode, operands)"
"maxsd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "DF")])
(define_insn "sse2_vmsmaxv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
......@@ -1682,19 +1643,6 @@
[(set_attr "type" "sseadd")
(set_attr "mode" "V2DF")])
(define_insn "*sse2_vmsminv2df3_finite"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(smin:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE2 && flag_finite_math_only
&& ix86_binary_operator_ok (SMIN, V2DFmode, operands)"
"minsd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "DF")])
(define_insn "sse2_vmsminv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
......
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