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lvzhengyang
riscv-gcc-1
Commits
c0e63064
Commit
c0e63064
authored
Mar 09, 2004
by
Kazu Hirata
Committed by
Kazu Hirata
Mar 09, 2004
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* config/m32r/m32r.md: Remove all define_peephole's.
From-SVN: r79170
parent
6ae08853
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gcc/ChangeLog
View file @
c0e63064
2004-03-09 Kazu Hirata <kazu@cs.umass.edu>
* config/m32r/m32r.md: Remove all define_peephole's.
2004-03-09 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.md: Remove trailing whitespace.
...
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gcc/config/m32r/m32r.md
View file @
c0e63064
...
...
@@ -2599,64 +2599,6 @@
)
;; Split up troublesome insns for better scheduling.
;; FIXME: Peepholes go at the end.
;; ??? Setting the type attribute may not be useful, but for completeness
;; we do it.
(define_peephole
[
(set (mem:SI (plus:SI (match_operand:SI 0 "register_operand" "r")
(const_int 4)))
(match_operand:SI 1 "register_operand" "r"))]
"0 && dead_or_set_p (insn, operands
[
0
]
)"
"st %1,@+%0"
[
(set_attr "type" "store2")
(set_attr "length" "2")])
;; This case is triggered by compiling this code:
;;
;; extern void sub(int
*
);
;; void main (void)
;; {
;; int i=2,j=3,k;
;; while (i < j) sub(
&k);
;; i = j / k;
;; sub(
&i);
;; i = j - k;
;; sub(
&i);
;; }
;;
;; Without the peephole the following assembler is generated for the
;; divide and subtract expressions:
;;
;; div r5,r4
;; mv r4,r5
;; st r4,@(4,sp)
;; bl sub
;;
;; Similar code is produced for the subtract expression. With this
;; peephole the redundant move is eliminated.
;;
;; This optimization only works if PRESERVE_DEATH_INFO_REGNO_P is
;; defined in m32r.h
(define_peephole
[
(set (match_operand:SI 0 "register_operand" "r")
(match_operand:SI 1 "register_operand" "r")
)
(set (mem:SI (plus: SI (match_operand:SI 2 "register_operand" "r")
(match_operand:SI 3 "immediate_operand" "J")))
(match_dup 0)
)
]
"0 && dead_or_set_p (insn, operands
[
0
]
)"
"st %1,@(%3,%2)"
[
(set_attr "type" "store4")
(set_attr "length" "4")
]
)
;; Block moves, see m32r.c for more details.
;; Argument 0 is the destination
;; Argument 1 is the source
...
...
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