Skip to content

R
riscv-gcc-1
Commit c0d4e710 by Kazu Hirata Committed by Kazu Hirata
Options

sh.c: Replace "gen_rtx (FOO, " with "gen_rtx_FOO (". 

	* config/sh/sh.c: Replace "gen_rtx (FOO, " with "gen_rtx_FOO (".
	* config/sh/sh.h: Likewise.
	* config/sh/sh.md: Likewise.

From-SVN: r77051
parent ffa67767
Showing with 69 additions and 63 deletions
gcc/ChangeLog
2004-01-31 Kazu Hirata <kazu@cs.umass.edu>
* config/sh/sh.c: Replace "gen_rtx (FOO, " with "gen_rtx_FOO (".
* config/sh/sh.h: Likewise.
* config/sh/sh.md: Likewise.
2004-01-31 Eric Botcazou <ebotcazou@libertysurf.fr>
* doc/invoke.texi (SPARC options): Restructure and update.
......
gcc/config/sh/sh.c
......@@ -676,8 +676,8 @@ expand_block_move (rtx *operands)
tree entry_name;
rtx sym;
rtx func_addr_rtx;
rtx r4 = gen_rtx (REG, SImode, 4);
rtx r5 = gen_rtx (REG, SImode, 5);
rtx r4 = gen_rtx_REG (SImode, 4);
rtx r5 = gen_rtx_REG (SImode, 5);
entry_name = get_identifier ("__movstrSI12_i4");
......@@ -694,9 +694,9 @@ expand_block_move (rtx *operands)
rtx sym;
rtx func_addr_rtx;
int dwords;
rtx r4 = gen_rtx (REG, SImode, 4);
rtx r5 = gen_rtx (REG, SImode, 5);
rtx r6 = gen_rtx (REG, SImode, 6);
rtx r4 = gen_rtx_REG (SImode, 4);
rtx r5 = gen_rtx_REG (SImode, 5);
rtx r6 = gen_rtx_REG (SImode, 6);
entry_name = get_identifier (bytes & 4
? "__movstr_i4_odd"
......@@ -956,13 +956,13 @@ prepare_scc_operands (enum rtx_code code)
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT)
(mode == SFmode ? emit_sf_insn : emit_df_insn)
(gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
gen_rtx (SET, VOIDmode, t_reg,
(gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx_SET (VOIDmode, t_reg,
gen_rtx (code, SImode,
sh_compare_op0, sh_compare_op1)),
gen_rtx (USE, VOIDmode, get_fpscr_rtx ()))));
gen_rtx_USE (VOIDmode, get_fpscr_rtx ()))));
else
emit_insn (gen_rtx (SET, VOIDmode, t_reg,
emit_insn (gen_rtx_SET (VOIDmode, t_reg,
gen_rtx (code, SImode, sh_compare_op0,
sh_compare_op1)));
......@@ -1001,9 +1001,9 @@ from_compare (rtx *operands, int code)
sh_compare_op1));
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT)
{
insn = gen_rtx (PARALLEL, VOIDmode,
insn = gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, insn,
gen_rtx (USE, VOIDmode, get_fpscr_rtx ())));
gen_rtx_USE (VOIDmode, get_fpscr_rtx ())));
(mode == SFmode ? emit_sf_insn : emit_df_insn) (insn);
}
else
......@@ -4131,7 +4131,7 @@ sh_reorg (void)
}
last_float_move = scan;
last_float = src;
newsrc = gen_rtx (MEM, mode,
newsrc = gen_rtx_MEM (mode,
(((TARGET_SH4 && ! TARGET_FMOVD)
|| REGNO (dst) == FPUL_REG)
? r0_inc_rtx
......@@ -5905,7 +5905,7 @@ sh_builtin_saveregs (void)
mem = gen_rtx_MEM (DFmode, fpregs);
set_mem_alias_set (mem, alias_set);
emit_move_insn (mem,
gen_rtx (REG, DFmode, BASE_ARG_REG (DFmode) + regno));
gen_rtx_REG (DFmode, BASE_ARG_REG (DFmode) + regno));
}
regno = first_floatreg;
if (regno & 1)
......@@ -5914,7 +5914,7 @@ sh_builtin_saveregs (void)
mem = gen_rtx_MEM (SFmode, fpregs);
set_mem_alias_set (mem, alias_set);
emit_move_insn (mem,
gen_rtx (REG, SFmode, BASE_ARG_REG (SFmode) + regno
gen_rtx_REG (SFmode, BASE_ARG_REG (SFmode) + regno
- (TARGET_LITTLE_ENDIAN != 0)));
}
}
......@@ -7654,7 +7654,7 @@ get_fpscr_rtx (void)
{
if (! fpscr_rtx)
{
fpscr_rtx = gen_rtx (REG, PSImode, FPSCR_REG);
fpscr_rtx = gen_rtx_REG (PSImode, FPSCR_REG);
REG_USERVAR_P (fpscr_rtx) = 1;
mark_user_reg (fpscr_rtx);
}
......
gcc/config/sh/sh.h
......@@ -1633,7 +1633,7 @@ extern enum reg_class reg_class_from_letter[];
tested here has to be kept in sync with the one in explow.c:promote_mode. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, \
gen_rtx_REG ( \
((GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_INT \
&& GET_MODE_SIZE (TYPE_MODE (VALTYPE)) < UNITS_PER_WORD \
&& (TREE_CODE (VALTYPE) == INTEGER_TYPE \
......@@ -2561,9 +2561,9 @@ struct sh_args {
prevalent. */ \
if (GET_MODE_SIZE (MODE) + offset - offset_base <= 64) \
{ \
sum = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
sum = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
GEN_INT (offset_base)); \
X = gen_rtx (PLUS, Pmode, sum, GEN_INT (offset - offset_base));\
X = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base));\
push_reload (sum, NULL_RTX, &XEXP (X, 0), NULL, \
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, (OPNUM), \
(TYPE)); \
......
gcc/config/sh/sh.md
......@@ -913,62 +913,62 @@
{
case EQ:
emit_insn (gen_seq (tmp));
operands[1] = gen_rtx (NE, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
break;
case NE:
emit_insn (gen_seq (tmp));
operands[1] = gen_rtx (EQ, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
break;
case GT:
emit_insn (gen_sgt (tmp));
operands[1] = gen_rtx (NE, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
break;
case LT:
emit_insn (gen_slt (tmp));
operands[1] = gen_rtx (NE, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
break;
case GE:
emit_insn (gen_slt (tmp));
operands[1] = gen_rtx (EQ, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
break;
case LE:
emit_insn (gen_sgt (tmp));
operands[1] = gen_rtx (EQ, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
break;
case GTU:
emit_insn (gen_sgtu (tmp));
operands[1] = gen_rtx (NE, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
break;
case LTU:
emit_insn (gen_sltu (tmp));
operands[1] = gen_rtx (NE, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
break;
case GEU:
emit_insn (gen_sltu (tmp));
operands[1] = gen_rtx (EQ, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
break;
case LEU:
emit_insn (gen_sgtu (tmp));
operands[1] = gen_rtx (EQ, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
break;
case UNORDERED:
emit_insn (gen_sunordered (tmp));
operands[1] = gen_rtx (NE, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx);
break;
case ORDERED:
emit_insn (gen_sunordered (tmp));
operands[1] = gen_rtx (EQ, VOIDmode, tmp, const0_rtx);
operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
break;
case UNEQ:
......@@ -3360,11 +3360,11 @@
"TARGET_SH2E"
"
{
rtx insn = emit_insn (gen_fpu_switch (gen_rtx (MEM, PSImode,
gen_rtx (PRE_DEC, Pmode,
rtx insn = emit_insn (gen_fpu_switch (gen_rtx_MEM (PSImode,
gen_rtx_PRE_DEC (Pmode,
stack_pointer_rtx)),
get_fpscr_rtx ()));
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, stack_pointer_rtx, NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, stack_pointer_rtx, NULL_RTX);
DONE;
}")
......@@ -3374,10 +3374,10 @@
"
{
rtx insn = emit_insn (gen_fpu_switch (get_fpscr_rtx (),
gen_rtx (MEM, PSImode,
gen_rtx (POST_INC, Pmode,
gen_rtx_MEM (PSImode,
gen_rtx_POST_INC (Pmode,
stack_pointer_rtx))));
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, stack_pointer_rtx, NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, stack_pointer_rtx, NULL_RTX);
DONE;
}")
......@@ -4276,19 +4276,19 @@
tos = gen_rtx_MEM (DFmode, stack_pointer_rtx);
}
else
tos = gen_rtx (MEM, DFmode, gen_rtx (PRE_DEC, Pmode, stack_pointer_rtx));
tos = gen_rtx_MEM (DFmode, gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx));
insn = emit_insn (gen_movdf_i4 (tos, operands[1], operands[2]));
if (! (TARGET_SH5 && true_regnum (operands[1]) < 16))
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, stack_pointer_rtx, NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, stack_pointer_rtx, NULL_RTX);
if (TARGET_SH5 && true_regnum (operands[0]) < 16)
tos = gen_rtx_MEM (DFmode, stack_pointer_rtx);
else
tos = gen_rtx (MEM, DFmode, gen_rtx (POST_INC, Pmode, stack_pointer_rtx));
tos = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (Pmode, stack_pointer_rtx));
insn = emit_insn (gen_movdf_i4 (operands[0], tos, operands[2]));
if (TARGET_SH5 && true_regnum (operands[0]) < 16)
emit_move_insn (stack_pointer_rtx, plus_constant (stack_pointer_rtx, 8));
else
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, stack_pointer_rtx, NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, stack_pointer_rtx, NULL_RTX);
DONE;
}")
......@@ -4327,7 +4327,7 @@
&& GET_CODE (XEXP (addr, 1)) == REG)
{
int offset;
rtx reg0 = gen_rtx (REG, Pmode, 0);
rtx reg0 = gen_rtx_REG (Pmode, 0);
rtx regop = operands[store_p], word0 ,word1;
if (GET_CODE (regop) == SUBREG)
......@@ -4338,9 +4338,9 @@
offset = 4;
mem = copy_rtx (mem);
PUT_MODE (mem, SImode);
word0 = gen_rtx (SUBREG, SImode, regop, 0);
word0 = gen_rtx_SUBREG (SImode, regop, 0);
alter_subreg (&word0);
word1 = gen_rtx (SUBREG, SImode, regop, 4);
word1 = gen_rtx_SUBREG (SImode, regop, 4);
alter_subreg (&word1);
if (store_p || ! refers_to_regno_p (REGNO (word0),
REGNO (word0) + 1, addr, 0))
......@@ -4419,10 +4419,10 @@
"
{
int dst = true_regnum (operands[0]), src = true_regnum (operands[1]);
emit_insn (gen_movsf_ie (gen_rtx (REG, SFmode, dst),
gen_rtx (REG, SFmode, src), operands[2]));
emit_insn (gen_movsf_ie (gen_rtx (REG, SFmode, dst + 1),
gen_rtx (REG, SFmode, src + 1), operands[2]));
emit_insn (gen_movsf_ie (gen_rtx_REG (SFmode, dst),
gen_rtx_REG (SFmode, src), operands[2]));
emit_insn (gen_movsf_ie (gen_rtx_REG (SFmode, dst + 1),
gen_rtx_REG (SFmode, src + 1), operands[2]));
DONE;
}")
......@@ -4439,15 +4439,15 @@
{
int regno = true_regnum (operands[0]);
rtx insn;
rtx mem2 = gen_rtx (MEM, SFmode, gen_rtx (POST_INC, Pmode, operands[1]));
rtx mem2 = gen_rtx_MEM (SFmode, gen_rtx_POST_INC (Pmode, operands[1]));
insn = emit_insn (gen_movsf_ie (gen_rtx (REG, SFmode,
insn = emit_insn (gen_movsf_ie (gen_rtx_REG (SFmode,
regno + !! TARGET_LITTLE_ENDIAN),
mem2, operands[2]));
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, operands[1], NULL_RTX);
insn = emit_insn (gen_movsf_ie (gen_rtx (REG, SFmode,
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, operands[1], NULL_RTX);
insn = emit_insn (gen_movsf_ie (gen_rtx_REG (SFmode,
regno + ! TARGET_LITTLE_ENDIAN),
gen_rtx (MEM, SFmode, operands[1]),
gen_rtx_MEM (SFmode, operands[1]),
operands[2]));
DONE;
}")
......@@ -4509,7 +4509,7 @@
operands[0] = copy_rtx (operands[0]);
PUT_MODE (operands[0], SFmode);
insn = emit_insn (gen_movsf_ie (operands[0],
gen_rtx (REG, SFmode,
gen_rtx_REG (SFmode,
regno + ! TARGET_LITTLE_ENDIAN),
operands[2]));
operands[0] = copy_rtx (operands[0]);
......@@ -4518,16 +4518,16 @@
{
adjust = gen_addsi3 (addr, addr, GEN_INT (4));
emit_insn_before (adjust, insn);
XEXP (operands[0], 0) = addr = gen_rtx (PRE_DEC, SImode, addr);
XEXP (operands[0], 0) = addr = gen_rtx_PRE_DEC (SImode, addr);
}
addr = XEXP (addr, 0);
if (! adjust)
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, addr, NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, addr, NULL_RTX);
insn = emit_insn (gen_movsf_ie (operands[0],
gen_rtx (REG, SFmode,
gen_rtx_REG (SFmode,
regno + !! TARGET_LITTLE_ENDIAN),
operands[2]));
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, addr, NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, addr, NULL_RTX);
DONE;
}")
......@@ -8180,10 +8180,10 @@ mov.l\\t1f,r0\\n\\
"
{
rtx insn = emit_insn (gen_fpu_switch (get_fpscr_rtx (),
gen_rtx (MEM, PSImode,
gen_rtx (POST_INC, Pmode,
gen_rtx_MEM (PSImode,
gen_rtx_POST_INC (Pmode,
operands[0]))));
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, operands[0], NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, operands[0], NULL_RTX);
}")
(define_split
......@@ -8194,10 +8194,10 @@ mov.l\\t1f,r0\\n\\
"
{
rtx insn = emit_insn (gen_fpu_switch (get_fpscr_rtx (),
gen_rtx (MEM, PSImode,
gen_rtx (POST_INC, Pmode,
gen_rtx_MEM (PSImode,
gen_rtx_POST_INC (Pmode,
operands[0]))));
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, operands[0], NULL_RTX);
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, operands[0], NULL_RTX);
}")
;; ??? This uses the fp unit, but has no type indicating that.
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment