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lvzhengyang
riscv-gcc-1
Commits
c0138701
Commit
c0138701
authored
Oct 24, 1992
by
Richard Kenner
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(movqi, movhi, reload_{in,out}{qi,hi}): Use a29k_set_memflags.
From-SVN: r2590
parent
5cafc658
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gcc/config/a29k/a29k.md
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gcc/config/a29k/a29k.md
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c0138701
...
@@ -1773,15 +1773,14 @@
...
@@ -1773,15 +1773,14 @@
{
{
rtx general = gen_reg_rtx (SImode);
rtx general = gen_reg_rtx (SImode);
rtx bp = gen_reg_rtx (PSImode);
rtx bp = gen_reg_rtx (PSImode);
rtx (
*
fcn) ()
if (TARGET_BYTE_WRITES)
= TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww;
emit_insn (gen_storehihww (XEXP (operands[0], 0),
rtx seq = (
*
fcn) (XEXP (operands
[
0
]
, 0),
gen_lowpart (SImode, operands[1]),
gen_lowpart (SImode, operands
[
1
]
),
general, bp));
general, bp);
else
emit_insn (gen_storehinhww (XEXP (operands[0], 0),
a29k_set_memflags (seq, operands
[
0
]
);
gen_lowpart (SImode, operands[1]),
emit_insn (seq);
general, bp));
DONE;
DONE;
}
}
}
}
...
@@ -1791,9 +1790,11 @@
...
@@ -1791,9 +1790,11 @@
{
{
rtx general = gen_reg_rtx (SImode);
rtx general = gen_reg_rtx (SImode);
rtx bp = gen_reg_rtx (PSImode);
rtx bp = gen_reg_rtx (PSImode);
rtx seq = gen_loadqi (gen_lowpart (SImode, operands
[
0
]
),
XEXP (operands
[
1
]
, 0), general, bp);
emit_insn (gen_loadqi (gen_lowpart (SImode, operands[0]),
a29k_set_memflags (seq, operands[1]);
XEXP (operands[1], 0), general, bp)
);
emit_insn (seq
);
DONE;
DONE;
}
}
}
}
...
@@ -1805,10 +1806,13 @@
...
@@ -1805,10 +1806,13 @@
(match_operand:PSI 2 "register_operand" "=b")])]
(match_operand:PSI 2 "register_operand" "=b")])]
"! TARGET_DW_ENABLE"
"! TARGET_DW_ENABLE"
"
"
{ emit_insn (gen_loadhi (gen_lowpart (SImode, operands
[
0
]
),
{ rtx seq = gen_loadhi (gen_lowpart (SImode, operands
[
0
]
),
a29k_get_reloaded_address (operands
[
1
]
),
a29k_get_reloaded_address (operands
[
1
]
),
gen_rtx (REG, SImode, R_TAV),
gen_rtx (REG, SImode, R_TAV),
operands
[
2
]
));
operands
[
2
]
);
a29k_set_memflags (seq, operands
[
1
]
);
emit_insn (seq);
DONE;
DONE;
}")
}")
...
@@ -1818,16 +1822,13 @@
...
@@ -1818,16 +1822,13 @@
(match_operand:PSI 2 "register_operand" "=b")])]
(match_operand:PSI 2 "register_operand" "=b")])]
"! TARGET_DW_ENABLE"
"! TARGET_DW_ENABLE"
"
"
{ if (TARGET_BYTE_WRITES)
{ rtx (
*
fcn) () = TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww;
emit_insn (gen_storehihww (a29k_get_reloaded_address (operands
[
0
]
),
rtx seq = (
*
fcn) (a29k_get_reloaded_address (operands
[
0
]
),
gen_lowpart (SImode, operands
[
1
]
),
gen_lowpart (SImode, operands
[
1
]
),
gen_rtx (REG, SImode, R_TAV),
gen_rtx (REG, SImode, R_TAV), operands
[
2
]
);
operands
[
2
]
));
else
a29k_set_memflags (seq, operands
[
0
]
);
emit_insn (gen_storehinhww (a29k_get_reloaded_address (operands
[
0
]
),
emit_insn (seq);
gen_lowpart (SImode, operands
[
1
]
),
gen_rtx (REG, SImode, R_TAV),
operands
[
2
]
));
DONE;
DONE;
}")
}")
...
@@ -1902,16 +1903,14 @@
...
@@ -1902,16 +1903,14 @@
{
{
rtx general = gen_reg_rtx (SImode);
rtx general = gen_reg_rtx (SImode);
rtx bp = gen_reg_rtx (PSImode);
rtx bp = gen_reg_rtx (PSImode);
rtx (
*
fcn) ()
if (TARGET_BYTE_WRITES)
= TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww;
emit_insn (gen_storeqihww (XEXP (operands[0], 0),
rtx seq = (
*
fcn) (XEXP (operands
[
0
]
, 0),
gen_lowpart (SImode, operands[1]),
gen_lowpart (SImode, operands
[
1
]
),
general, bp));
general, bp);
else
emit_insn (gen_storeqinhww (XEXP (operands[0], 0),
a29k_set_memflags (seq, operands
[
0
]
);
gen_lowpart (SImode, operands[1]),
emit_insn (seq);
general, bp));
DONE;
}
}
}
}
else if (GET_CODE (operands
[
1
]
) == MEM)
else if (GET_CODE (operands
[
1
]
) == MEM)
...
@@ -1920,9 +1919,11 @@
...
@@ -1920,9 +1919,11 @@
{
{
rtx general = gen_reg_rtx (SImode);
rtx general = gen_reg_rtx (SImode);
rtx bp = gen_reg_rtx (PSImode);
rtx bp = gen_reg_rtx (PSImode);
rtx seq = gen_loadqi (gen_lowpart (SImode, operands
[
0
]
),
XEXP (operands
[
1
]
, 0), general, bp);
emit_insn (gen_loadqi (gen_lowpart (SImode, operands[0]),
a29k_set_memflags (seq, operands[1]);
XEXP (operands[1], 0), general, bp)
);
emit_insn (seq
);
DONE;
DONE;
}
}
}
}
...
@@ -1934,10 +1935,13 @@
...
@@ -1934,10 +1935,13 @@
(match_operand:PSI 2 "register_operand" "=b")])]
(match_operand:PSI 2 "register_operand" "=b")])]
"! TARGET_DW_ENABLE"
"! TARGET_DW_ENABLE"
"
"
{ emit_insn (gen_loadqi (gen_lowpart (SImode, operands
[
0
]
),
{ rtx seq = gen_loadqi (gen_lowpart (SImode, operands
[
0
]
),
a29k_get_reloaded_address (operands
[
1
]
),
a29k_get_reloaded_address (operands
[
1
]
),
gen_rtx (REG, SImode, R_TAV),
gen_rtx (REG, SImode, R_TAV),
operands
[
2
]
));
operands
[
2
]
);
a29k_set_memflags (seq, operands
[
1
]
);
emit_insn (seq);
DONE;
DONE;
}")
}")
...
@@ -1947,16 +1951,13 @@
...
@@ -1947,16 +1951,13 @@
(match_operand:PSI 2 "register_operand" "=b")])]
(match_operand:PSI 2 "register_operand" "=b")])]
"! TARGET_DW_ENABLE"
"! TARGET_DW_ENABLE"
"
"
{ if (TARGET_BYTE_WRITES)
{ rtx (
*
fcn) () = TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww;
emit_insn (gen_storeqihww (a29k_get_reloaded_address (operands
[
0
]
),
rtx seq = (
*
fcn) (a29k_get_reloaded_address (operands
[
0
]
),
gen_lowpart (SImode, operands
[
1
]
),
gen_lowpart (SImode, operands
[
1
]
),
gen_rtx (REG, SImode, R_TAV),
gen_rtx (REG, SImode, R_TAV), operands
[
2
]
);
operands
[
2
]
));
else
a29k_set_memflags (seq, operands
[
0
]
);
emit_insn (gen_storeqinhww (a29k_get_reloaded_address (operands
[
0
]
),
emit_insn (seq);
gen_lowpart (SImode, operands
[
1
]
),
gen_rtx (REG, SImode, R_TAV),
operands
[
2
]
));
DONE;
DONE;
}")
}")
...
...
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