Commit bfb792b6 by Kyrylo Tkachov Committed by Kyrylo Tkachov

[simplify-rtx][2/2] Use constants from pool when simplifying binops

	* simplify-rtx.c (simplify_binary_operation): If either operand was
	a constant pool reference use them if all other simplifications failed.

	* gcc.target/aarch64/fmul_fcvt_1.c: Add multiply-by-32 cases.

From-SVN: r229086
parent 39252973
2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* simplify-rtx.c (simplify_binary_operation): If either operand was
a constant pool reference use them if all other simplifications failed.
2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md * config/aarch64/aarch64.md
(*aarch64_fcvt<su_optab><GPF:mode><GPI:mode>2_mult): New pattern. (*aarch64_fcvt<su_optab><GPF:mode><GPI:mode>2_mult): New pattern.
* config/aarch64/aarch64-simd.md * config/aarch64/aarch64-simd.md
...@@ -2001,7 +2001,17 @@ simplify_binary_operation (enum rtx_code code, machine_mode mode, ...@@ -2001,7 +2001,17 @@ simplify_binary_operation (enum rtx_code code, machine_mode mode,
tem = simplify_const_binary_operation (code, mode, trueop0, trueop1); tem = simplify_const_binary_operation (code, mode, trueop0, trueop1);
if (tem) if (tem)
return tem; return tem;
return simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1); tem = simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
if (tem)
return tem;
/* If the above steps did not result in a simplification and op0 or op1
were constant pool references, use the referenced constants directly. */
if (trueop0 != op0 || trueop1 != op1)
return simplify_gen_binary (code, mode, trueop0, trueop1);
return NULL_RTX;
} }
/* Subroutine of simplify_binary_operation. Simplify a binary operation /* Subroutine of simplify_binary_operation. Simplify a binary operation
......
2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/fmul_fcvt_1.c: Add multiply-by-32 cases.
2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/fmul_fcvt_1.c: New test. * gcc.target/aarch64/fmul_fcvt_1.c: New test.
* gcc.target/aarch64/fmul_fcvt_2.c: Likewise. * gcc.target/aarch64/fmul_fcvt_2.c: Likewise.
......
...@@ -83,6 +83,16 @@ FUNC_DEFD (16) ...@@ -83,6 +83,16 @@ FUNC_DEFD (16)
/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], d\[0-9\]*.*#4" 1 } } */ /* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], d\[0-9\]*.*#4" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], d\[0-9\]*.*#4" 1 } } */ /* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], d\[0-9\]*.*#4" 1 } } */
FUNC_DEFS (32)
FUNC_DEFD (32)
/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\], s\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\], s\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\], d\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\], d\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], s\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], s\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], d\[0-9\]*.*#5" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], d\[0-9\]*.*#5" 1 } } */
#define FUNC_TESTS(__a, __b) \ #define FUNC_TESTS(__a, __b) \
do \ do \
...@@ -120,10 +130,12 @@ main (void) ...@@ -120,10 +130,12 @@ main (void)
FUNC_TESTS (4, i); FUNC_TESTS (4, i);
FUNC_TESTS (8, i); FUNC_TESTS (8, i);
FUNC_TESTS (16, i); FUNC_TESTS (16, i);
FUNC_TESTS (32, i);
FUNC_TESTD (4, i); FUNC_TESTD (4, i);
FUNC_TESTD (8, i); FUNC_TESTD (8, i);
FUNC_TESTD (16, i); FUNC_TESTD (16, i);
FUNC_TESTD (32, i);
} }
return 0; return 0;
} }
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment