Commit bf9afb7d by DJ Delorie Committed by DJ Delorie

rx.c (valid_psw_flag): New.

* config/rx/rx.c (valid_psw_flag): New.
(rx_expand_builtin): Call it for setpsw/clrpsw.
(rx_expand_builtin_mvtipl): Pass an integer to IN_RANGE, not an
RTX.
* config/rx/rx.md (bitclr): Don't mark the output as early-clobber.
(bitclr_in_memory): Likewise.
(clrspw, setpsw, mvfc, mvtc, mvtipl): Make volatile.

From-SVN: r164376
parent 765c3e8f
2010-09-17 DJ Delorie <dj@redhat.com>
* config/rx/rx.c (rx_print_operand): If __builtin_rx_setpsw() is
passed an invalid value, print an error instead of ICEing.
(valid_psw_flag): New.
(rx_expand_builtin): Call it for setpsw/clrpsw.
(rx_expand_builtin_mvtipl): Pass an integer to IN_RANGE, not an
RTX.
* config/rx/rx.md (bitclr): Don't mark the output as early-clobber.
(bitclr_in_memory): Likewise.
(clrspw, setpsw, mvfc, mvtc, mvtipl): Make volatile.
2010-09-17 H.J. Lu <hongjiu.lu@intel.com> 2010-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR middle-end/45678 PR middle-end/45678
......
...@@ -1905,7 +1905,7 @@ rx_expand_builtin_mvtipl (rtx arg) ...@@ -1905,7 +1905,7 @@ rx_expand_builtin_mvtipl (rtx arg)
if (rx_cpu_type == RX610) if (rx_cpu_type == RX610)
return NULL_RTX; return NULL_RTX;
if (! CONST_INT_P (arg) || ! IN_RANGE (arg, 0, (1 << 4) - 1)) if (! CONST_INT_P (arg) || ! IN_RANGE (INTVAL (arg), 0, (1 << 4) - 1))
return NULL_RTX; return NULL_RTX;
emit_insn (gen_mvtipl (arg)); emit_insn (gen_mvtipl (arg));
...@@ -1974,6 +1974,31 @@ rx_expand_builtin_round (rtx arg, rtx target) ...@@ -1974,6 +1974,31 @@ rx_expand_builtin_round (rtx arg, rtx target)
return target; return target;
} }
static int
valid_psw_flag (rtx op, char *which)
{
static int mvtc_inform_done = 0;
if (GET_CODE (op) == CONST_INT)
switch (INTVAL (op))
{
case 0: case 'c': case 'C':
case 1: case 'z': case 'Z':
case 2: case 's': case 'S':
case 3: case 'o': case 'O':
case 8: case 'i': case 'I':
case 9: case 'u': case 'U':
return 1;
}
error ("__builtin_rx_%s takes 'C', 'Z', 'S', 'O', 'I', or 'U'", which);
if (!mvtc_inform_done)
error ("use __builtin_rx_mvtc (0, ... ) to write arbitrary values to PSW");
mvtc_inform_done = 1;
return 0;
}
static rtx static rtx
rx_expand_builtin (tree exp, rx_expand_builtin (tree exp,
rtx target, rtx target,
...@@ -1989,10 +2014,14 @@ rx_expand_builtin (tree exp, ...@@ -1989,10 +2014,14 @@ rx_expand_builtin (tree exp,
switch (fcode) switch (fcode)
{ {
case RX_BUILTIN_BRK: emit_insn (gen_brk ()); return NULL_RTX; case RX_BUILTIN_BRK: emit_insn (gen_brk ()); return NULL_RTX;
case RX_BUILTIN_CLRPSW: return rx_expand_void_builtin_1_arg case RX_BUILTIN_CLRPSW:
(op, gen_clrpsw, false); if (!valid_psw_flag (op, "clrpsw"))
case RX_BUILTIN_SETPSW: return rx_expand_void_builtin_1_arg return NULL_RTX;
(op, gen_setpsw, false); return rx_expand_void_builtin_1_arg (op, gen_clrpsw, false);
case RX_BUILTIN_SETPSW:
if (!valid_psw_flag (op, "setpsw"))
return NULL_RTX;
return rx_expand_void_builtin_1_arg (op, gen_setpsw, false);
case RX_BUILTIN_INT: return rx_expand_void_builtin_1_arg case RX_BUILTIN_INT: return rx_expand_void_builtin_1_arg
(op, gen_int, false); (op, gen_int, false);
case RX_BUILTIN_MACHI: return rx_expand_builtin_mac (exp, gen_machi); case RX_BUILTIN_MACHI: return rx_expand_builtin_mac (exp, gen_machi);
......
...@@ -1369,7 +1369,7 @@ ...@@ -1369,7 +1369,7 @@
) )
(define_insn "bitclr" (define_insn "bitclr"
[(set:SI (match_operand:SI 0 "register_operand" "+r") [(set:SI (match_operand:SI 0 "register_operand" "=r")
(and:SI (match_operand:SI 1 "register_operand" "0") (and:SI (match_operand:SI 1 "register_operand" "0")
(not:SI (ashift:SI (const_int 1) (not:SI (ashift:SI (const_int 1)
(match_operand:SI 2 "nonmemory_operand" "ri")))))] (match_operand:SI 2 "nonmemory_operand" "ri")))))]
...@@ -1379,7 +1379,7 @@ ...@@ -1379,7 +1379,7 @@
) )
(define_insn "bitclr_in_memory" (define_insn "bitclr_in_memory"
[(set:QI (match_operand:QI 0 "memory_operand" "+m") [(set:QI (match_operand:QI 0 "memory_operand" "=m")
(and:QI (match_operand:QI 1 "memory_operand" "0") (and:QI (match_operand:QI 1 "memory_operand" "0")
(not:QI (ashift:QI (const_int 1) (not:QI (ashift:QI (const_int 1)
(match_operand:QI 2 "nonmemory_operand" "ri")))))] (match_operand:QI 2 "nonmemory_operand" "ri")))))]
...@@ -1803,7 +1803,7 @@ ...@@ -1803,7 +1803,7 @@
;; Clear Processor Status Word ;; Clear Processor Status Word
(define_insn "clrpsw" (define_insn "clrpsw"
[(unspec:SI [(match_operand:SI 0 "immediate_operand" "i")] [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
UNSPEC_BUILTIN_CLRPSW) UNSPEC_BUILTIN_CLRPSW)
(clobber (reg:CC CC_REG))] (clobber (reg:CC CC_REG))]
"" ""
...@@ -1813,7 +1813,7 @@ ...@@ -1813,7 +1813,7 @@
;; Set Processor Status Word ;; Set Processor Status Word
(define_insn "setpsw" (define_insn "setpsw"
[(unspec:SI [(match_operand:SI 0 "immediate_operand" "i")] [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
UNSPEC_BUILTIN_SETPSW) UNSPEC_BUILTIN_SETPSW)
(clobber (reg:CC CC_REG))] (clobber (reg:CC CC_REG))]
"" ""
...@@ -1824,7 +1824,7 @@ ...@@ -1824,7 +1824,7 @@
;; Move from control register ;; Move from control register
(define_insn "mvfc" (define_insn "mvfc"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "immediate_operand" "i")] (unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "i")]
UNSPEC_BUILTIN_MVFC))] UNSPEC_BUILTIN_MVFC))]
"" ""
"mvfc\t%C1, %0" "mvfc\t%C1, %0"
...@@ -1833,7 +1833,7 @@ ...@@ -1833,7 +1833,7 @@
;; Move to control register ;; Move to control register
(define_insn "mvtc" (define_insn "mvtc"
[(unspec:SI [(match_operand:SI 0 "immediate_operand" "i,i") [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i,i")
(match_operand:SI 1 "nonmemory_operand" "r,i")] (match_operand:SI 1 "nonmemory_operand" "r,i")]
UNSPEC_BUILTIN_MVTC)] UNSPEC_BUILTIN_MVTC)]
"" ""
...@@ -1848,7 +1848,7 @@ ...@@ -1848,7 +1848,7 @@
;; Move to interrupt priority level ;; Move to interrupt priority level
(define_insn "mvtipl" (define_insn "mvtipl"
[(unspec:SI [(match_operand:SI 0 "immediate_operand" "Uint04")] [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "Uint04")]
UNSPEC_BUILTIN_MVTIPL)] UNSPEC_BUILTIN_MVTIPL)]
"" ""
"mvtipl\t%0" "mvtipl\t%0"
......
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