[multiple changes]

2015-01-13  Andrew Pinski   <apinski@cavium.com>

        * config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp): Reject
        volatile mems.
        (aarch64_operands_adjust_ok_for_ldpstp): Likewise.


2015-01-13  Andrew Pinski  <apinski@cavium.com>

        * gcc.target/aarch64/volatileloadpair-1.c: New testcase.
        * gcc.target/aarch64/volatileloadpair-2.c: New testcase.

From-SVN: r219530

gcc/ChangeLog

+2015-01-13  Andrew Pinski   <apinski@cavium.com>
+
+	* config/aarch64/aarch64.c (aarch64_operands_ok_for_ldpstp): Reject
+	volatile mems.
+	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
+
 2015-01-13  Jakub Jelinek  <jakub@redhat.com>
 
 	PR middle-end/63974

gcc/config/aarch64/aarch64.c

@@ -10630,6 +10630,10 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load,
       reg_2 = operands[3];
     }
 
+  /* The mems cannot be volatile.  */
+  if (MEM_VOLATILE_P (mem_1) || MEM_VOLATILE_P (mem_2))
+    return false;
+
   /* Check if the addresses are in the form of [base+offset].  */
   extract_base_offset_in_addr (mem_1, &base_1, &offset_1);
   if (base_1 == NULL_RTX || offset_1 == NULL_RTX)
@@ -10737,6 +10741,11 @@ aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load,
   if (!MEM_P (mem_1) || aarch64_mem_pair_operand (mem_1, mode))
     return false;
 
+  /* The mems cannot be volatile.  */
+  if (MEM_VOLATILE_P (mem_1) || MEM_VOLATILE_P (mem_2)
+      || MEM_VOLATILE_P (mem_3) ||MEM_VOLATILE_P (mem_4))
+    return false;
+
   /* Check if the addresses are in the form of [base+offset].  */
   extract_base_offset_in_addr (mem_1, &base_1, &offset_1);
   if (base_1 == NULL_RTX || offset_1 == NULL_RTX)

gcc/testsuite/ChangeLog

+2015-01-13  Andrew Pinski  <apinski@cavium.com>
+
+	* gcc.target/aarch64/volatileloadpair-1.c: New testcase.
+	* gcc.target/aarch64/volatileloadpair-2.c: New testcase.
+
 2015-01-13  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/64406

gcc/testsuite/gcc.target/aarch64/volatileloadpair-1.c

+/* { dg-do compile } */
+/* { dg-do options "-O2" } */
+/* volatile references should not produce load pair. */
+/* { dg-final { scan-assembler-not "ldp\t" } } */
+
+int f0(volatile int *a)
+{
+  int b = a[0];
+  int c = a[1];
+  return b + c;
+}
+
+int f1(volatile int *a)
+{
+  int b = a[1];
+  int c = a[0];
+  return b + c;
+}
+
+int f2(volatile int *a)
+{
+  int b = a[1];
+  int c = a[2];
+  return b + c;
+}
+
+int f3(volatile int *a)
+{
+  int b = a[2];
+  int c = a[1];
+  return b + c;
+}
+
+int f4(volatile int *a)
+{
+  int b = a[2];
+  int c = a[3];
+  return b + c;
+}
+
+int f5(volatile int *a)
+{
+  int b = a[3];
+  int c = a[2];
+  return b + c;
+}

gcc/testsuite/gcc.target/aarch64/volatileloadpair-2.c

+/* { dg-do compile } */
+/* { dg-do options "-O2" } */
+/* volatile references should not produce load pair. */
+/* { dg-final { scan-assembler-not "ldp\t" } } */
+
+int f0(volatile int *a)
+{
+  int b = a[0];
+  int c = a[1];
+  int d = a[2];
+  int e = a[3];
+  return b + c + d + e;
+}
+
+int f1(volatile int *a)
+{
+  int b = a[1];
+  int c = a[0];
+  int d = a[2];
+  int e = a[3];
+  return b + c + d + e;
+}
+
+int f2(volatile int *a)
+{
+  int b = a[1];
+  int c = a[0];
+  int d = a[3];
+  int e = a[2];
+  return b + c + d + e;
+}
+
+int f3(volatile int *a)
+{
+  int b = a[1];
+  int c = a[3];
+  int d = a[0];
+  int e = a[2];
+  return b + c + d + e;
+}
+
+int f4(volatile int *a)
+{
+  int b = a[1];
+  int c = a[3];
+  int d = a[2];
+  int e = a[0];
+  return b + c + d + e;
+}