i386.c (ix86_expand_fp_compare): Delay creating of scratch register until when it is really needed.

	* i386.c (ix86_expand_fp_compare): Delay creating of scratch register
	until when it is really needed.
	(ix86_expand_compare): Update call of ix86_expand_fp_compare.
	* i386.h (PREDICATE_CODES): Add all codes for sse_comparison_operator
	* i386.md (float?i?f splitter): Don't force source operand to memory
	for SSE.
	(sse_movdfcc): Fix constraint.
	(sse_movdfcc splitter): Handle properly the second alternative.

From-SVN: r40216

gcc/ChangeLog

+Sat Mar  3 19:47:13 CET 2001  Jan Hubicka  <jh@suse.cz>
+
+	* i386.c (ix86_expand_fp_compare): Delay creating of scratch register
+	until when it is really needed.
+	(ix86_expand_compare): Update call of ix86_expand_fp_compare.
+	* i386.h (PREDICATE_CODES): Add all codes for sse_comparison_operator
+	* i386.md (float?i?f splitter): Don't force source operand to memory
+	for SSE.
+	(sse_movdfcc): Fix constraint.
+	(sse_movdfcc splitter): Handle properly the second alternative.
+
 2001-03-03  Neil Booth  <neil@daikokuya.demon.co.uk>
 
         * cpplex.c (parse_string): Unconditionally pedwarn.

gcc/config/i386/i386.c

@@ -5196,6 +5196,8 @@ ix86_expand_fp_compare (code, op0, op1, scratch, second_test, bypass_test)
 	{
 	  tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1);
 	  tmp2 = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), 9);
+	  if (!scratch)
+	    scratch = gen_reg_rtx (HImode);
 	  emit_insn (gen_rtx_SET (VOIDmode, scratch, tmp2));
 	  emit_insn (gen_x86_sahf_1 (scratch));
 	}
@@ -5217,6 +5219,8 @@ ix86_expand_fp_compare (code, op0, op1, scratch, second_test, bypass_test)
       /* Sadness wrt reg-stack pops killing fpsr -- gotta get fnstsw first.  */
       tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1);
       tmp2 = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), 9);
+      if (!scratch)
+	scratch = gen_reg_rtx (HImode);
       emit_insn (gen_rtx_SET (VOIDmode, scratch, tmp2));
 
       /* In the unordered case, we have to check C2 for NaN's, which
@@ -5357,7 +5361,7 @@ ix86_expand_compare (code, second_test, bypass_test)
     *bypass_test = NULL_RTX;
 
   if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
-    ret = ix86_expand_fp_compare (code, op0, op1, gen_reg_rtx (HImode),
+    ret = ix86_expand_fp_compare (code, op0, op1, NULL_RTX,
 				  second_test, bypass_test);
   else
     ret = ix86_expand_int_compare (code, op0, op1);

gcc/config/i386/i386.h

@@ -2869,7 +2869,9 @@ do { long l;						\
   {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU, UNORDERED, \
 				 ORDERED, LT, UNLT, GT, UNGT, LE, UNLE,	\
 				 GE, UNGE, LTGT, UNEQ}},		\
-  {"sse_comparison_operator", {EQ, LT, LE, UNORDERED }},		\
+  {"sse_comparison_operator", {EQ, LT, LE, UNORDERED, NE, UNGE, UNGT,	\
+			       ORDERED, UNEQ, UNLT, UNLE, LTGT, GE, GT	\
+			       }},					\
   {"ix86_comparison_operator", {EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU,	\
 			       GTU, UNORDERED, ORDERED, UNLE, UNLT,	\
 			       UNGE, UNGT, LTGT, UNEQ }},		\

gcc/config/i386/i386.md

@@ -4450,7 +4450,8 @@
 (define_split
   [(set (match_operand 0 "register_operand" "")
 	(float (match_operand 1 "register_operand" "")))]
-  "reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
+  "reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))
+   && FP_REG_P (operands[0])"
   [(const_int 0)]
   "
 {
@@ -12493,7 +12494,7 @@
 			 (match_operand:SF 5 "nonimmediate_operand" "xm#f,xm#f,f#x,f#x,x#f,x#f,f#x,f#x,x#f,x#f")])
 		      (match_operand:SF 2 "nonimmediate_operand" "x#fr,0#fr,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx,0#rx")
 		      (match_operand:SF 3 "nonimmediate_operand" "x#fr,x#fr,0#fx,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx")))
-   (clobber (match_scratch:SF 6 "=2,&5,X,X,X,X,X,X,X,X"))
+   (clobber (match_scratch:SF 6 "=2,&4,X,X,X,X,X,X,X,X"))
    (clobber (reg:CC 17))]
   "TARGET_SSE
    && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
@@ -12506,7 +12507,7 @@
 			 (match_operand:DF 5 "nonimmediate_operand" "xm#f,xm#f,f#x,f#x,x#f,x#f,f#x,f#x,x#f,x#f")])
 		      (match_operand:DF 2 "nonimmediate_operand" "x#fr,0#fr,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx,0#rx")
 		      (match_operand:DF 3 "nonimmediate_operand" "x#fr,x#fr,0#fx,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx")))
-   (clobber (match_scratch:DF 6 "=2,&5,X,X,X,X,X,X,X,X"))
+   (clobber (match_scratch:DF 6 "=2,&4,X,X,X,X,X,X,X,X"))
    (clobber (reg:CC 17))]
   "TARGET_SSE2
    && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
@@ -12547,7 +12548,7 @@
 			 (match_operand 5 "nonimmediate_operand" "")])
 		      (match_operand 2 "register_operand" "")
 		      (match_operand 3 "register_operand" "")))
-   (clobber (match_dup 2))
+   (clobber (match_operand 6 "" ""))
    (clobber (reg:CC 17))]
   "SSE_REG_P (operands[0]) && reload_completed"
   [(set (match_dup 4) (match_op_dup 1 [(match_dup 4) (match_dup 5)]))