Commit bf5582c3 by Mihail Ionescu

[PATCH, GCC/ARM] Fix MVE scalar shift tests

*** gcc/ChangeLog ***

2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>

	* config/arm/arm.md: Prevent scalar shifts from being
	used when big endian is enabled.

*** gcc/testsuite/ChangeLog ***

2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>

	* gcc.target/arm/armv8_1m-shift-imm-1.c: Add MVE target checks.
	* gcc.target/arm/armv8_1m-shift-reg-1.c: Likewise.
	* lib/target-supports.exp
	(check_effective_target_arm_v8_1m_mve_ok_nocache): New.
	(check_effective_target_arm_v8_1m_mve_ok): New.
	(add_options_for_v8_1m_mve): New.
parent b150c838
2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
* config/arm/arm.md: Prevent scalar shifts from being used when big
endian is enabled.
2020-02-21 Jan Hubicka <hubicka@ucw.cz> 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
Richard Biener <rguenther@suse.de> Richard Biener <rguenther@suse.de>
......
...@@ -4399,7 +4399,7 @@ ...@@ -4399,7 +4399,7 @@
(match_operand:SI 2 "reg_or_int_operand")))] (match_operand:SI 2 "reg_or_int_operand")))]
"TARGET_32BIT" "TARGET_32BIT"
" "
if (TARGET_HAVE_MVE) if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN)
{ {
if (!reg_or_int_operand (operands[2], SImode)) if (!reg_or_int_operand (operands[2], SImode))
operands[2] = force_reg (SImode, operands[2]); operands[2] = force_reg (SImode, operands[2]);
...@@ -4443,7 +4443,7 @@ ...@@ -4443,7 +4443,7 @@
"TARGET_32BIT" "TARGET_32BIT"
" "
/* Armv8.1-M Mainline double shifts are not expanded. */ /* Armv8.1-M Mainline double shifts are not expanded. */
if (TARGET_HAVE_MVE if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
&& arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2]))) && arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2])))
{ {
if (!reg_overlap_mentioned_p(operands[0], operands[1])) if (!reg_overlap_mentioned_p(operands[0], operands[1]))
...@@ -4478,7 +4478,7 @@ ...@@ -4478,7 +4478,7 @@
"TARGET_32BIT" "TARGET_32BIT"
" "
/* Armv8.1-M Mainline double shifts are not expanded. */ /* Armv8.1-M Mainline double shifts are not expanded. */
if (TARGET_HAVE_MVE if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
&& long_shift_imm (operands[2], GET_MODE (operands[2]))) && long_shift_imm (operands[2], GET_MODE (operands[2])))
{ {
if (!reg_overlap_mentioned_p(operands[0], operands[1])) if (!reg_overlap_mentioned_p(operands[0], operands[1]))
......
2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
* gcc.target/arm/armv8_1m-shift-imm-1.c: Add MVE target checks.
* gcc.target/arm/armv8_1m-shift-reg-1.c: Likewise.
* lib/target-supports.exp
(check_effective_target_arm_v8_1m_mve_ok_nocache): New.
(check_effective_target_arm_v8_1m_mve_ok): New.
(add_options_for_v8_1m_mve): New.
2020-02-21 Uroš Bizjak <ubizjak@gmail.com> 2020-02-21 Uroš Bizjak <ubizjak@gmail.com>
* gcc.dg/vect/vect-epilogues.c (scan-tree-dump): Require * gcc.dg/vect/vect-epilogues.c (scan-tree-dump): Require
......
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-options "-O2 -march=armv8.1-m.main+mve -mfloat-abi=softfp" } */ /* { dg-options "-O2 -mfloat-abi=softfp -mlittle-endian" } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
long long longval1; long long longval1;
long long unsigned longval2; long long unsigned longval2;
......
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-options "-O2 -march=armv8.1-m.main+mve -mfloat-abi=softfp" } */ /* { dg-options "-O2 -mfloat-abi=softfp -mlittle-endian" } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
long long longval2; long long longval2;
int intval2; int intval2;
......
...@@ -4828,6 +4828,48 @@ proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } { ...@@ -4828,6 +4828,48 @@ proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
return 0; return 0;
} }
# Return 1 if the target supports ARMv8.1-M MVE
# instructions, 0 otherwise. The test is valid for ARM.
# Record the command line options needed.
proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
global et_arm_v8_1m_mve_flags
set et_arm_v8_1m_mve_flags ""
if { ![istarget arm*-*-*] } {
return 0;
}
# Iterate through sets of options to find the compiler flags that
# need to be added to the -march option.
foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
if { [check_no_compiler_messages_nocache \
arm_v8_1m_mve_ok object {
#if !defined (__ARM_FEATURE_MVE)
#error "__ARM_FEATURE_MVE not defined"
#endif
} "$flags -mthumb"] } {
set et_arm_v8_1m_mve_flags "$flags -mthumb"
return 1
}
}
return 0;
}
proc check_effective_target_arm_v8_1m_mve_ok { } {
return [check_cached_effective_target arm_v8_1m_mve_ok \
check_effective_target_arm_v8_1m_mve_ok_nocache]
}
proc add_options_for_arm_v8_1m_mve { flags } {
if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
return "$flags"
}
global et_arm_v8_1m_mve_flags
return "$flags $et_arm_v8_1m_mve_flags"
}
proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } { proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \ return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache] check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment