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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
bee06f3d
Commit
bee06f3d
authored
Jun 27, 1994
by
Richard Earnshaw
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include "expr.h".
(arm_fpu): New variable. (arm_gen_movstrqi): Fix typo. From-SVN: r7573
parent
4a193497
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gcc/config/arm/arm.c
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gcc/config/arm/arm.c
View file @
bee06f3d
...
...
@@ -36,6 +36,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#include "flags.h"
#include "reload.h"
#include "tree.h"
#include "expr.h"
/* The maximum number of insns skipped which will be conditionalised if
possible. */
...
...
@@ -56,9 +57,11 @@ rtx arm_compare_op0, arm_compare_op1;
int
arm_compare_fp
;
/* What type of cpu are we compiling for? */
enum
processor_type
arm_cpu
;
/* Waht type of floating point are we compiling for? */
enum
floating_point_type
arm_fpu
;
/* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, we
must report the mode of the memory reference from PRINT_OPERAND to
PRINT_OPERAND_ADDRESS. */
...
...
@@ -1627,7 +1630,8 @@ arm_gen_movstrqi (operands)
abort
();
/* The bytes we want are in the top end of the word */
emit_insn
(
gen_lshrsi3
(
tmp
,
part_bytes_reg
,
8
*
(
4
-
last_bytes
)));
emit_insn
(
gen_lshrsi3
(
tmp
,
part_bytes_reg
,
GEN_INT
(
8
*
(
4
-
last_bytes
))));
part_bytes_reg
=
tmp
;
while
(
last_bytes
)
...
...
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