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riscv-gcc-1
Commit be9596fe by Segher Boessenkool Committed by Segher Boessenkool
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rs6000: Remove rs6000_nonimmediate_operand 

Now rs6000_nonimmediate_operand is just nonimmediate_operand.


	* config/rs6000/predicates.md (rs6000_nonimmediate_operand): Delete.
	* config/rs6000/rs6000.md (*movsi_internal1, movsi_from_sf,
	*mov<mode>_softfloat, and an anonymous splitter): Use
	nonimmediate_operand instead of rs6000_nonimmediate_operand.

From-SVN: r248987
parent 346081bd
Showing with 14 additions and 14 deletions
gcc/ChangeLog
2017-06-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/predicates.md (rs6000_nonimmediate_operand): Delete.
* config/rs6000/rs6000.md (*movsi_internal1, movsi_from_sf,
*mov<mode>_softfloat, and an anonymous splitter): Use
nonimmediate_operand instead of rs6000_nonimmediate_operand.
2017-06-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/darwin.h (REGISTER_NAMES): Delete the SPE_ACC and
SPEFSCR registers.
* config/rs6000/rs6000.c (rs6000_reg_names, alt_reg_names): Ditto.
......
gcc/config/rs6000/predicates.md
......@@ -1150,13 +1150,6 @@
return gpc_reg_operand (op, mode);
})
;; Return true if OP is a non-immediate operand.
(define_predicate "rs6000_nonimmediate_operand"
(match_code "reg,subreg,mem")
{
return nonimmediate_operand (op, mode);
})
;; Return true if operand is an operator used in rotate-and-mask instructions.
(define_predicate "rotate_mask_operator"
(match_code "rotate,ashift,lshiftrt"))
......
gcc/config/rs6000/rs6000.md
......@@ -6693,7 +6693,7 @@
;; XXLXOR 0 XXLORC -1 P9 const MTVSRWZ MFVSRWZ
;; MF%1 MT%0 MT%0 NOP
(define_insn "*movsi_internal1"
[(set (match_operand:SI 0 "rs6000_nonimmediate_operand"
[(set (match_operand:SI 0 "nonimmediate_operand"
"=r, r, r, ?*wI, ?*wH,
m, ?Z, ?Z, r, r,
r, ?*wIwH, ?*wJwK, ?*wJwK, ?*wu,
......@@ -6749,7 +6749,7 @@
4, 4, 4, 4")])
(define_insn "*movsi_internal1_single"
[(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "=r,r,r,m,r,r,r,r,*c*l,*h,*h,m,*f")
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m,r,r,r,r,*c*l,*h,*h,m,*f")
(match_operand:SI 1 "input_operand" "r,U,m,r,I,L,n,*h,r,r,0,f,m"))]
"TARGET_SINGLE_FPU &&
(gpc_reg_operand (operands[0], SImode) || gpc_reg_operand (operands[1], SImode))"
......@@ -6790,7 +6790,7 @@
;; VSX->VSX
(define_insn_and_split "movsi_from_sf"
[(set (match_operand:SI 0 "rs6000_nonimmediate_operand"
[(set (match_operand:SI 0 "nonimmediate_operand"
"=r, r, ?*wI, ?*wH, m,
m, wY, Z, r, wIwH,
?wK")
......@@ -7236,7 +7236,7 @@
;; LWZ LFS LXSSP LXSSPX STW STFIWX
;; STXSIWX GPR->VSX VSX->GPR GPR->GPR
(define_insn_and_split "movsf_from_si"
[(set (match_operand:SF 0 "rs6000_nonimmediate_operand"
[(set (match_operand:SF 0 "nonimmediate_operand"
"=!r, f, wb, wu, m, Z,
Z, wy, ?r, !r")
......@@ -7521,7 +7521,7 @@
[(set_attr "length" "8,8,8,8,20,20,16")])
(define_insn_and_split "*mov<mode>_softfloat"
[(set (match_operand:FMOVE128 0 "rs6000_nonimmediate_operand" "=Y,r,r")
[(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=Y,r,r")
(match_operand:FMOVE128 1 "input_operand" "r,YGHF,r"))]
"TARGET_SOFT_FLOAT
&& (gpc_reg_operand (operands[0], <MODE>mode)
......@@ -8463,7 +8463,7 @@
;; AVX const
(define_insn "*movdi_internal32"
[(set (match_operand:DI 0 "rs6000_nonimmediate_operand"
[(set (match_operand:DI 0 "nonimmediate_operand"
"=Y, r, r, ^m, ^d, ^d,
r, ^wY, $Z, ^wb, $wv, ^wi,
*wo, *wo, *wv, *wi, *wi, *wv,
......@@ -8525,7 +8525,7 @@
}")
(define_split
[(set (match_operand:DIFD 0 "rs6000_nonimmediate_operand" "")
[(set (match_operand:DIFD 0 "nonimmediate_operand" "")
(match_operand:DIFD 1 "input_operand" ""))]
"reload_completed && !TARGET_POWERPC64
&& gpr_or_gpr_p (operands[0], operands[1])
......
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