Commit be792bce by Ilya Tocar Committed by Kirill Yukhin

constraints.md (Yk): Swap meaning with k.

gcc/
	* config/i386/constraints.md (Yk): Swap meaning with k.
	* config/i386/i386.md (movhi_internal): Change Yk to k.
	(movqi_internal): Ditto.
	(*k<logic><mode>): Ditto.
	(*andhi_1): Ditto.
	(*andqi_1): Ditto.
	(kandn<mode>): Ditto.
	(*<code>hi_1): Ditto.
	(*<code>qi_1): Ditto.
	(kxnor<mode>): Ditto.
	(kortestzhi): Ditto.
	(kortestchi): Ditto.
	(kunpckhi): Ditto.
	(*one_cmplhi2_1): Ditto.
	(*one_cmplqi2_1): Ditto.
	* config/i386/sse.md (): Change k to Yk.
	(avx512f_load<mode>_mask): Ditto.
	(avx512f_blendm<mode>): Ditto.
	(avx512f_store<mode>_mask): Ditto.
	(avx512f_storeu<ssemodesuffix>512_mask): Ditto.
	(avx512f_storedqu<mode>_mask): Ditto.
	(avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Ditto.
	(avx512f_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
	(avx512f_vmcmp<mode>3<round_saeonly_name>): Ditto.
	(avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Ditto.
	(avx512f_maskcmp<mode>3): Ditto.
	(avx512f_fmadd_<mode>_mask<round_name>): Ditto.
	(avx512f_fmadd_<mode>_mask3<round_name>): Ditto.
	(avx512f_fmsub_<mode>_mask<round_name>): Ditto.
	(avx512f_fmsub_<mode>_mask3<round_name>): Ditto.
	(avx512f_fnmadd_<mode>_mask<round_name>): Ditto.
	(avx512f_fnmadd_<mode>_mask3<round_name>): Ditto.
	(avx512f_fnmsub_<mode>_mask<round_name>): Ditto.
	(avx512f_fnmsub_<mode>_mask3<round_name>): Ditto.
	(avx512f_fmaddsub_<mode>_mask<round_name>): Ditto.
	(avx512f_fmaddsub_<mode>_mask3<round_name>): Ditto.
	(avx512f_fmsubadd_<mode>_mask<round_name>): Ditto.
	(avx512f_fmsubadd_<mode>_mask3<round_name>): Ditto.
	(avx512f_vextract<shuffletype>32x4_1_maskm): Ditto.
	(vec_extract_lo_<mode>_maskm): Ditto.
	(vec_extract_hi_<mode>_maskm): Ditto.
	(avx512f_vternlog<mode>_mask): Ditto.
	(avx512f_fixupimm<mode>_mask<round_saeonly_name>): Ditto.
	(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Ditto.
	(avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
	(avx512f_<code>v8div16qi2_mask): Ditto.
	(avx512f_<code>v8div16qi2_mask_store): Ditto.
	(avx512f_eq<mode>3<mask_scalar_merge_name>_1): Ditto.
	(avx512f_gt<mode>3<mask_scalar_merge_name>): Ditto.
	(avx512f_testm<mode>3<mask_scalar_merge_name>): Ditto.
	(avx512f_testnm<mode>3<mask_scalar_merge_name>): Ditto.
	(*avx512pf_gatherpf<mode>sf_mask): Ditto.
	(*avx512pf_gatherpf<mode>df_mask): Ditto.
	(*avx512pf_scatterpf<mode>sf_mask): Ditto.
	(*avx512pf_scatterpf<mode>df_mask): Ditto.
	(avx512cd_maskb_vec_dupv8di): Ditto.
	(avx512cd_maskw_vec_dupv16si): Ditto.
	(avx512f_vpermi2var<mode>3_maskz): Ditto.
	(avx512f_vpermi2var<mode>3_mask): Ditto.
	(avx512f_vpermi2var<mode>3_mask): Ditto.
	(avx512f_vpermt2var<mode>3_maskz): Ditto.
	(*avx512f_gathersi<mode>): Ditto.
	(*avx512f_gathersi<mode>_2): Ditto.
	(*avx512f_gatherdi<mode>): Ditto.
	(*avx512f_gatherdi<mode>_2): Ditto.
	(*avx512f_scattersi<mode>): Ditto.
	(*avx512f_scatterdi<mode>): Ditto.
	(avx512f_compress<mode>_mask): Ditto.
	(avx512f_compressstore<mode>_mask): Ditto.
	(avx512f_expand<mode>_mask): Ditto.
	* config/i386/subst.md (mask): Change k to Yk.
	(mask_scalar_merge): Ditto.
	(sd): Ditto.

gcc/testsuite/
	* gcc.target/i386/avx512f-inline-asm.c: Swap Yk and k.
	* gcc.target/i386/avx512f-kmovw-1.c: Also allow k0.

From-SVN: r207341
parent 0878d68a
2014-01-31 Ilya Tocar <ilya.tocar@intel.com>
* config/i386/constraints.md (Yk): Swap meaning with k.
* config/i386/i386.md (movhi_internal): Change Yk to k.
(movqi_internal): Ditto.
(*k<logic><mode>): Ditto.
(*andhi_1): Ditto.
(*andqi_1): Ditto.
(kandn<mode>): Ditto.
(*<code>hi_1): Ditto.
(*<code>qi_1): Ditto.
(kxnor<mode>): Ditto.
(kortestzhi): Ditto.
(kortestchi): Ditto.
(kunpckhi): Ditto.
(*one_cmplhi2_1): Ditto.
(*one_cmplqi2_1): Ditto.
* config/i386/sse.md (): Change k to Yk.
(avx512f_load<mode>_mask): Ditto.
(avx512f_blendm<mode>): Ditto.
(avx512f_store<mode>_mask): Ditto.
(avx512f_storeu<ssemodesuffix>512_mask): Ditto.
(avx512f_storedqu<mode>_mask): Ditto.
(avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Ditto.
(avx512f_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_vmcmp<mode>3<round_saeonly_name>): Ditto.
(avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Ditto.
(avx512f_maskcmp<mode>3): Ditto.
(avx512f_fmadd_<mode>_mask<round_name>): Ditto.
(avx512f_fmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_fmsub_<mode>_mask<round_name>): Ditto.
(avx512f_fmsub_<mode>_mask3<round_name>): Ditto.
(avx512f_fnmadd_<mode>_mask<round_name>): Ditto.
(avx512f_fnmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_fnmsub_<mode>_mask<round_name>): Ditto.
(avx512f_fnmsub_<mode>_mask3<round_name>): Ditto.
(avx512f_fmaddsub_<mode>_mask<round_name>): Ditto.
(avx512f_fmaddsub_<mode>_mask3<round_name>): Ditto.
(avx512f_fmsubadd_<mode>_mask<round_name>): Ditto.
(avx512f_fmsubadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vextract<shuffletype>32x4_1_maskm): Ditto.
(vec_extract_lo_<mode>_maskm): Ditto.
(vec_extract_hi_<mode>_maskm): Ditto.
(avx512f_vternlog<mode>_mask): Ditto.
(avx512f_fixupimm<mode>_mask<round_saeonly_name>): Ditto.
(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Ditto.
(avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
(avx512f_<code>v8div16qi2_mask): Ditto.
(avx512f_<code>v8div16qi2_mask_store): Ditto.
(avx512f_eq<mode>3<mask_scalar_merge_name>_1): Ditto.
(avx512f_gt<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_testm<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_testnm<mode>3<mask_scalar_merge_name>): Ditto.
(*avx512pf_gatherpf<mode>sf_mask): Ditto.
(*avx512pf_gatherpf<mode>df_mask): Ditto.
(*avx512pf_scatterpf<mode>sf_mask): Ditto.
(*avx512pf_scatterpf<mode>df_mask): Ditto.
(avx512cd_maskb_vec_dupv8di): Ditto.
(avx512cd_maskw_vec_dupv16si): Ditto.
(avx512f_vpermi2var<mode>3_maskz): Ditto.
(avx512f_vpermi2var<mode>3_mask): Ditto.
(avx512f_vpermi2var<mode>3_mask): Ditto.
(avx512f_vpermt2var<mode>3_maskz): Ditto.
(*avx512f_gathersi<mode>): Ditto.
(*avx512f_gathersi<mode>_2): Ditto.
(*avx512f_gatherdi<mode>): Ditto.
(*avx512f_gatherdi<mode>_2): Ditto.
(*avx512f_scattersi<mode>): Ditto.
(*avx512f_scatterdi<mode>): Ditto.
(avx512f_compress<mode>_mask): Ditto.
(avx512f_compressstore<mode>_mask): Ditto.
(avx512f_expand<mode>_mask): Ditto.
* config/i386/subst.md (mask): Change k to Yk.
(mask_scalar_merge): Ditto.
(sd): Ditto.
2014-01-31 Marc Glisse <marc.glisse@inria.fr> 2014-01-31 Marc Glisse <marc.glisse@inria.fr>
* doc/extend.texi (Vector Extensions): Document ?: in C++. * doc/extend.texi (Vector Extensions): Document ?: in C++.
......
...@@ -78,10 +78,10 @@ ...@@ -78,10 +78,10 @@
"TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS" "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
"Second from top of 80387 floating-point stack (@code{%st(1)}).") "Second from top of 80387 floating-point stack (@code{%st(1)}).")
(define_register_constraint "k" "TARGET_AVX512F ? MASK_EVEX_REGS : NO_REGS" (define_register_constraint "Yk" "TARGET_AVX512F ? MASK_EVEX_REGS : NO_REGS"
"@internal Any mask register that can be used as predicate, i.e. k1-k7.") "@internal Any mask register that can be used as predicate, i.e. k1-k7.")
(define_register_constraint "Yk" "TARGET_AVX512F ? MASK_REGS : NO_REGS" (define_register_constraint "k" "TARGET_AVX512F ? MASK_REGS : NO_REGS"
"@internal Any mask register.") "@internal Any mask register.")
;; Vector registers (also used for plain floating point nowadays). ;; Vector registers (also used for plain floating point nowadays).
......
...@@ -2306,8 +2306,8 @@ ...@@ -2306,8 +2306,8 @@
(define_insn "*movhi_internal" (define_insn "*movhi_internal"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,Yk,Yk,rm") [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k,rm")
(match_operand:HI 1 "general_operand" "r ,rn,rm,rn,rm,Yk,Yk"))] (match_operand:HI 1 "general_operand" "r ,rn,rm,rn,rm,k,k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))" "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{ {
switch (get_attr_type (insn)) switch (get_attr_type (insn))
...@@ -2380,9 +2380,9 @@ ...@@ -2380,9 +2380,9 @@
(define_insn "*movqi_internal" (define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand" [(set (match_operand:QI 0 "nonimmediate_operand"
"=q,q ,q ,r,r ,?r,m ,Yk,Yk,r") "=q,q ,q ,r,r ,?r,m ,k,k,r")
(match_operand:QI 1 "general_operand" (match_operand:QI 1 "general_operand"
"q ,qn,qm,q,rn,qm,qn,r ,Yk,Yk"))] "q ,qn,qm,q,rn,qm,qn,r ,k,k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))" "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{ {
switch (get_attr_type (insn)) switch (get_attr_type (insn))
...@@ -7815,9 +7815,9 @@ ...@@ -7815,9 +7815,9 @@
(match_dup 2)))]) (match_dup 2)))])
(define_insn "*k<logic><mode>" (define_insn "*k<logic><mode>"
[(set (match_operand:SWI12 0 "mask_reg_operand" "=Yk") [(set (match_operand:SWI12 0 "mask_reg_operand" "=k")
(any_logic:SWI12 (match_operand:SWI12 1 "mask_reg_operand" "Yk") (any_logic:SWI12 (match_operand:SWI12 1 "mask_reg_operand" "k")
(match_operand:SWI12 2 "mask_reg_operand" "Yk")))] (match_operand:SWI12 2 "mask_reg_operand" "k")))]
"TARGET_AVX512F" "TARGET_AVX512F"
"k<logic>w\t{%2, %1, %0|%0, %1, %2}"; "k<logic>w\t{%2, %1, %0|%0, %1, %2}";
[(set_attr "mode" "<MODE>") [(set_attr "mode" "<MODE>")
...@@ -7947,9 +7947,9 @@ ...@@ -7947,9 +7947,9 @@
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*andhi_1" (define_insn "*andhi_1"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,Ya,!Yk") [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,Ya,!k")
(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm,Yk") (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm,k")
(match_operand:HI 2 "general_operand" "rn,rm,L,Yk"))) (match_operand:HI 2 "general_operand" "rn,rm,L,k")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (AND, HImode, operands)" "ix86_binary_operator_ok (AND, HImode, operands)"
{ {
...@@ -7978,9 +7978,9 @@ ...@@ -7978,9 +7978,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do? ;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*andqi_1" (define_insn "*andqi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r,!Yk") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r,!k")
(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,Yk") (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,k")
(match_operand:QI 2 "general_operand" "qn,qmn,rn,Yk"))) (match_operand:QI 2 "general_operand" "qn,qmn,rn,k")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (AND, QImode, operands)" "ix86_binary_operator_ok (AND, QImode, operands)"
"@ "@
...@@ -8003,11 +8003,11 @@ ...@@ -8003,11 +8003,11 @@
(set_attr "mode" "QI")]) (set_attr "mode" "QI")])
(define_insn "kandn<mode>" (define_insn "kandn<mode>"
[(set (match_operand:SWI12 0 "register_operand" "=r,&r,!Yk") [(set (match_operand:SWI12 0 "register_operand" "=r,&r,!k")
(and:SWI12 (and:SWI12
(not:SWI12 (not:SWI12
(match_operand:SWI12 1 "register_operand" "r,0,Yk")) (match_operand:SWI12 1 "register_operand" "r,0,k"))
(match_operand:SWI12 2 "register_operand" "r,r,Yk"))) (match_operand:SWI12 2 "register_operand" "r,r,k")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F" "TARGET_AVX512F"
"@ "@
...@@ -8388,10 +8388,10 @@ ...@@ -8388,10 +8388,10 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "*<code>hi_1" (define_insn "*<code>hi_1"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!Yk") [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!k")
(any_or:HI (any_or:HI
(match_operand:HI 1 "nonimmediate_operand" "%0,0,Yk") (match_operand:HI 1 "nonimmediate_operand" "%0,0,k")
(match_operand:HI 2 "general_operand" "<g>,r<i>,Yk"))) (match_operand:HI 2 "general_operand" "<g>,r<i>,k")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (<CODE>, HImode, operands)" "ix86_binary_operator_ok (<CODE>, HImode, operands)"
"@ "@
...@@ -8403,9 +8403,9 @@ ...@@ -8403,9 +8403,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do? ;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*<code>qi_1" (define_insn "*<code>qi_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r,!Yk") [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r,!k")
(any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,Yk") (any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,k")
(match_operand:QI 2 "general_operand" "qmn,qn,rn,Yk"))) (match_operand:QI 2 "general_operand" "qmn,qn,rn,k")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (<CODE>, QImode, operands)" "ix86_binary_operator_ok (<CODE>, QImode, operands)"
"@ "@
...@@ -8465,11 +8465,11 @@ ...@@ -8465,11 +8465,11 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "kxnor<mode>" (define_insn "kxnor<mode>"
[(set (match_operand:SWI12 0 "register_operand" "=r,!Yk") [(set (match_operand:SWI12 0 "register_operand" "=r,!k")
(not:SWI12 (not:SWI12
(xor:SWI12 (xor:SWI12
(match_operand:SWI12 1 "register_operand" "0,Yk") (match_operand:SWI12 1 "register_operand" "0,k")
(match_operand:SWI12 2 "register_operand" "r,Yk")))) (match_operand:SWI12 2 "register_operand" "r,k"))))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F" "TARGET_AVX512F"
"@ "@
...@@ -8498,8 +8498,8 @@ ...@@ -8498,8 +8498,8 @@
[(set (reg:CCZ FLAGS_REG) [(set (reg:CCZ FLAGS_REG)
(compare:CCZ (compare:CCZ
(ior:HI (ior:HI
(match_operand:HI 0 "register_operand" "Yk") (match_operand:HI 0 "register_operand" "k")
(match_operand:HI 1 "register_operand" "Yk")) (match_operand:HI 1 "register_operand" "k"))
(const_int 0)))] (const_int 0)))]
"TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)" "TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)"
"kortestw\t{%1, %0|%0, %1}" "kortestw\t{%1, %0|%0, %1}"
...@@ -8511,8 +8511,8 @@ ...@@ -8511,8 +8511,8 @@
[(set (reg:CCC FLAGS_REG) [(set (reg:CCC FLAGS_REG)
(compare:CCC (compare:CCC
(ior:HI (ior:HI
(match_operand:HI 0 "register_operand" "Yk") (match_operand:HI 0 "register_operand" "k")
(match_operand:HI 1 "register_operand" "Yk")) (match_operand:HI 1 "register_operand" "k"))
(const_int -1)))] (const_int -1)))]
"TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)" "TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)"
"kortestw\t{%1, %0|%0, %1}" "kortestw\t{%1, %0|%0, %1}"
...@@ -8521,12 +8521,12 @@ ...@@ -8521,12 +8521,12 @@
(set_attr "prefix" "vex")]) (set_attr "prefix" "vex")])
(define_insn "kunpckhi" (define_insn "kunpckhi"
[(set (match_operand:HI 0 "register_operand" "=Yk") [(set (match_operand:HI 0 "register_operand" "=k")
(ior:HI (ior:HI
(ashift:HI (ashift:HI
(match_operand:HI 1 "register_operand" "Yk") (match_operand:HI 1 "register_operand" "k")
(const_int 8)) (const_int 8))
(zero_extend:HI (match_operand:QI 2 "register_operand" "Yk"))))] (zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))]
"TARGET_AVX512F" "TARGET_AVX512F"
"kunpckbw\t{%2, %1, %0|%0, %1, %2}" "kunpckbw\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "mode" "HI") [(set_attr "mode" "HI")
...@@ -9140,8 +9140,8 @@ ...@@ -9140,8 +9140,8 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "*one_cmplhi2_1" (define_insn "*one_cmplhi2_1"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,!Yk") [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,!k")
(not:HI (match_operand:HI 1 "nonimmediate_operand" "0,Yk")))] (not:HI (match_operand:HI 1 "nonimmediate_operand" "0,k")))]
"ix86_unary_operator_ok (NOT, HImode, operands)" "ix86_unary_operator_ok (NOT, HImode, operands)"
"@ "@
not{w}\t%0 not{w}\t%0
...@@ -9153,8 +9153,8 @@ ...@@ -9153,8 +9153,8 @@
;; %%% Potential partial reg stall on alternative 1. What to do? ;; %%% Potential partial reg stall on alternative 1. What to do?
(define_insn "*one_cmplqi2_1" (define_insn "*one_cmplqi2_1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r,!Yk") [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r,!k")
(not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,Yk")))] (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,k")))]
"ix86_unary_operator_ok (NOT, QImode, operands)" "ix86_unary_operator_ok (NOT, QImode, operands)"
"@ "@
not{b}\t%0 not{b}\t%0
......
...@@ -66,7 +66,7 @@ ...@@ -66,7 +66,7 @@
(vec_merge:SUBST_V (vec_merge:SUBST_V
(match_dup 1) (match_dup 1)
(match_operand:SUBST_V 2 "vector_move_operand" "0C") (match_operand:SUBST_V 2 "vector_move_operand" "0C")
(match_operand:<avx512fmaskmode> 3 "register_operand" "k")))]) (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))])
(define_subst_attr "mask_scalar_merge_name" "mask_scalar_merge" "" "_mask") (define_subst_attr "mask_scalar_merge_name" "mask_scalar_merge" "" "_mask")
(define_subst_attr "mask_scalar_merge_operand3" "mask_scalar_merge" "" "%{%3%}") (define_subst_attr "mask_scalar_merge_operand3" "mask_scalar_merge" "" "%{%3%}")
...@@ -79,7 +79,7 @@ ...@@ -79,7 +79,7 @@
[(set (match_dup 0) [(set (match_dup 0)
(and:SUBST_S (and:SUBST_S
(match_dup 1) (match_dup 1)
(match_operand:SUBST_S 3 "register_operand" "k")))]) (match_operand:SUBST_S 3 "register_operand" "Yk")))])
(define_subst_attr "sd_maskz_name" "sd" "" "_maskz_1") (define_subst_attr "sd_maskz_name" "sd" "" "_maskz_1")
(define_subst_attr "sd_mask_op4" "sd" "" "%{%5%}%N4") (define_subst_attr "sd_mask_op4" "sd" "" "%{%5%}%N4")
...@@ -95,7 +95,7 @@ ...@@ -95,7 +95,7 @@
(vec_merge:SUBST_V (vec_merge:SUBST_V
(match_dup 1) (match_dup 1)
(match_operand:SUBST_V 2 "const0_operand" "C") (match_operand:SUBST_V 2 "const0_operand" "C")
(match_operand:<avx512fmaskmode> 3 "register_operand" "k"))) (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))
]) ])
(define_subst_attr "round_name" "round" "" "_round") (define_subst_attr "round_name" "round" "" "_round")
......
2014-01-31 Ilya Tocar <ilya.tocar@intel.com>
* gcc.target/i386/avx512f-inline-asm.c: Swap Yk and k.
* gcc.target/i386/avx512f-kmovw-1.c: Also allow k0.
2014-01-31 Richard Biener <rguenther@suse.de> 2014-01-31 Richard Biener <rguenther@suse.de>
PR middle-end/59990 PR middle-end/59990
......
...@@ -42,8 +42,8 @@ avx512f_test (void) ...@@ -42,8 +42,8 @@ avx512f_test (void)
msk_src2 = 0x0F0F; msk_src2 = 0x0F0F;
asm ("kandw\t%2, %1, %0" asm ("kandw\t%2, %1, %0"
: "=Yk" (msk_dst) : "=k" (msk_dst)
: "Yk" (msk_src1), "Yk" (msk_src2)); : "k" (msk_src1), "k" (msk_src2));
msk_dst_ref = _mm512_kand (msk_src1, msk_src2); msk_dst_ref = _mm512_kand (msk_src1, msk_src2);
if (msk_dst != msk_dst_ref) if (msk_dst != msk_dst_ref)
...@@ -59,7 +59,7 @@ avx512f_test (void) ...@@ -59,7 +59,7 @@ avx512f_test (void)
asm ("vpaddd\t%2, %1, %0 %{%3%}%{z%}" asm ("vpaddd\t%2, %1, %0 %{%3%}%{z%}"
: "=x" (dst.x) : "=x" (dst.x)
: "x" (src1.x), "x" (src2.x), "k" (msk_dst)); : "x" (src1.x), "x" (src2.x), "Yk" (msk_dst));
calc_vpadd_mask_zeroed (dst_ref, msk_dst, src1.a, src2.a); calc_vpadd_mask_zeroed (dst_ref, msk_dst, src1.a, src2.a);
......
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */ /* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler "kmovw\[ \\t\]+\[^\n\]*%k\[1-7\]" } } */ /* { dg-final { scan-assembler "kmovw\[ \\t\]+\[^\n\]*%k\[0-7\]" } } */
#include <immintrin.h> #include <immintrin.h>
volatile __mmask16 k1; volatile __mmask16 k1;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment