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lvzhengyang
riscv-gcc-1
Commits
bdf13188
Commit
bdf13188
authored
Oct 10, 2014
by
Eric Botcazou
Committed by
Eric Botcazou
Oct 10, 2014
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* lra-assigns.c (assign_by_spills): Error out on spill failure.
From-SVN: r216059
parent
a6c63173
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13 additions
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7 deletions
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gcc/ChangeLog
+4
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gcc/lra-assigns.c
+9
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gcc/ChangeLog
View file @
bdf13188
2014
-
10
-
10
Eric
Botcazou
<
ebotcazou
@
adacore
.
com
>
*
lra
-
assigns
.
c
(
assign_by_spills
):
Error
out
on
spill
failure
.
2014
-
10
-
09
Markus
Trippelsdorf
<
markus
@
trippelsdorf
.
de
>
2014
-
10
-
09
Markus
Trippelsdorf
<
markus
@
trippelsdorf
.
de
>
*
pa
-
polymorphic
-
call
.
c
(
check_stmt_for_type_change
):
Move
*
pa
-
polymorphic
-
call
.
c
(
check_stmt_for_type_change
):
Move
gcc/lra-assigns.c
View file @
bdf13188
...
@@ -1286,10 +1286,9 @@ assign_by_spills (void)
...
@@ -1286,10 +1286,9 @@ assign_by_spills (void)
break
;
break
;
if
(
iter
>
0
)
if
(
iter
>
0
)
{
{
/* We did not assign hard regs to reload pseudos after two
/* We did not assign hard regs to reload pseudos after two iterations.
iteration. It means something is wrong with asm insn
Either it's an asm and something is wrong with the constraints, or
constraints. Report it. */
we have run out of spill registers; error out in either case. */
bool
asm_p
=
false
;
bitmap_head
failed_reload_insns
;
bitmap_head
failed_reload_insns
;
bitmap_initialize
(
&
failed_reload_insns
,
&
reg_obstack
);
bitmap_initialize
(
&
failed_reload_insns
,
&
reg_obstack
);
...
@@ -1299,7 +1298,7 @@ assign_by_spills (void)
...
@@ -1299,7 +1298,7 @@ assign_by_spills (void)
bitmap_ior_into
(
&
failed_reload_insns
,
bitmap_ior_into
(
&
failed_reload_insns
,
&
lra_reg_info
[
regno
].
insn_bitmap
);
&
lra_reg_info
[
regno
].
insn_bitmap
);
/* Assign an arbitrary hard register of regno class to
/* Assign an arbitrary hard register of regno class to
avoid further trouble with th
e asm insns
. */
avoid further trouble with th
is insn
. */
bitmap_clear_bit
(
&
all_spilled_pseudos
,
regno
);
bitmap_clear_bit
(
&
all_spilled_pseudos
,
regno
);
assign_hard_regno
assign_hard_regno
(
ira_class_hard_regs
[
regno_allocno_class_array
[
regno
]][
0
],
(
ira_class_hard_regs
[
regno_allocno_class_array
[
regno
]][
0
],
...
@@ -1310,7 +1309,6 @@ assign_by_spills (void)
...
@@ -1310,7 +1309,6 @@ assign_by_spills (void)
insn
=
lra_insn_recog_data
[
u
]
->
insn
;
insn
=
lra_insn_recog_data
[
u
]
->
insn
;
if
(
asm_noperands
(
PATTERN
(
insn
))
>=
0
)
if
(
asm_noperands
(
PATTERN
(
insn
))
>=
0
)
{
{
asm_p
=
true
;
error_for_asm
(
insn
,
error_for_asm
(
insn
,
"%<asm%> operand has impossible constraints"
);
"%<asm%> operand has impossible constraints"
);
/* Avoid further trouble with this insn.
/* Avoid further trouble with this insn.
...
@@ -1331,8 +1329,12 @@ assign_by_spills (void)
...
@@ -1331,8 +1329,12 @@ assign_by_spills (void)
lra_set_insn_deleted
(
insn
);
lra_set_insn_deleted
(
insn
);
}
}
}
}
else
{
error
(
"unable to find a register to spill"
);
fatal_insn
(
"this is the insn:"
,
insn
);
}
}
}
lra_assert
(
asm_p
);
break
;
break
;
}
}
/* This is a very rare event. We can not assign a hard register
/* This is a very rare event. We can not assign a hard register
...
...
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