Commit bdd77024 by Richard Sandiford Committed by Richard Sandiford

invoke.texi: Replace -march=24kf with -march=24kf2_1 and -march=24kx with -march=24kf1_1.

gcc/
2007-07-03  Richard Sandiford  <richard@codesourcery.com>
	    David Ung  <davidu@mips.com>

	* doc/invoke.texi: Replace -march=24kf with -march=24kf2_1 and
	-march=24kx with -march=24kf1_1.  Likewise 24ke[fx], 34k[fx]
	and 74k[fx].  Document aliases for the new options.
	* config/mips/mips.h (PROCESSOR_24KF): Rename to...
	(PROCESSOR_24KF2_1): ...this.
	(PROCESSOR_24KX): Rename to...
	(PROCESSOR_24KF1_1): ...this.
	(PROCESSOR_74KF): Rename to...
	(PROCESSOR_74KF2_1): ...this.
	(PROCESSOR_74KX): Rename to...
	(PROCESSOR_74KF1_1): ...this.
	(TUNE_74K): Update PROCESSOR_* names.
	* config/mips/mips.c (mips_cpu_info): Add 24kf2_1 as a synonym
	for 24kf.  Add 24kf1_1 and 24kfx as synonyms for 24kx.  Likewise
	the 24ke*, 34k* and 74k* processors.  Update PROCESSOR_* names.
	(mips_rtx_cost_data): Update processor names in comments.
	(mips_issue_rate): Update PROCESSOR_* names.
	* config/mips/mips.md (cpu): Rename 24kf to 24kf2_1, 24kx to
	24kf1_1, 74kf to 74kf2_1 and 74kx to 74kf1_1.
	* config/mips/24k.md: Rename FPU-related r24k_* insn reservations
	to r24kf2_1_*.  Rename r24kx_* insn reservations to r24kf1_1_*.
	Update cpu attribute names.
	(r24k_fpu_iss): Rename this reservation to...
	(r24kf2_1_fpu_iss): ...this and update all uses.
	(r24kx_fpu_iss): Rename this reservation to...
	(r24kf1_1_fpu_iss): ...this and update all uses.
	* config/mips/74k.md: Rename FPU-related r74kf_* insn reservations
	to r74kf2_1_*.  Rename r74kx_* insn reservations to r74kf1_1_*.
	Update cpu attribute names.

Co-Authored-By: David Ung <davidu@mips.com>

From-SVN: r126266
parent fbaeb717
2007-07-03 Richard Sandiford <richard@codesourcery.com>
David Ung <davidu@mips.com>
* doc/invoke.texi: Replace -march=24kf with -march=24kf2_1 and
-march=24kx with -march=24kf1_1. Likewise 24ke[fx], 34k[fx]
and 74k[fx]. Document aliases for the new options.
* config/mips/mips.h (PROCESSOR_24KF): Rename to...
(PROCESSOR_24KF2_1): ...this.
(PROCESSOR_24KX): Rename to...
(PROCESSOR_24KF1_1): ...this.
(PROCESSOR_74KF): Rename to...
(PROCESSOR_74KF2_1): ...this.
(PROCESSOR_74KX): Rename to...
(PROCESSOR_74KF1_1): ...this.
(TUNE_74K): Update PROCESSOR_* names.
* config/mips/mips.c (mips_cpu_info): Add 24kf2_1 as a synonym
for 24kf. Add 24kf1_1 and 24kfx as synonyms for 24kx. Likewise
the 24ke*, 34k* and 74k* processors. Update PROCESSOR_* names.
(mips_rtx_cost_data): Update processor names in comments.
(mips_issue_rate): Update PROCESSOR_* names.
* config/mips/mips.md (cpu): Rename 24kf to 24kf2_1, 24kx to
24kf1_1, 74kf to 74kf2_1 and 74kx to 74kf1_1.
* config/mips/24k.md: Rename FPU-related r24k_* insn reservations
to r24kf2_1_*. Rename r24kx_* insn reservations to r24kf1_1_*.
Update cpu attribute names.
(r24k_fpu_iss): Rename this reservation to...
(r24kf2_1_fpu_iss): ...this and update all uses.
(r24kx_fpu_iss): Rename this reservation to...
(r24kf1_1_fpu_iss): ...this and update all uses.
* config/mips/74k.md: Rename FPU-related r74kf_* insn reservations
to r74kf2_1_*. Rename r74kx_* insn reservations to r74kf1_1_*.
Update cpu attribute names.
2007-07-01 Kaz Kojima <kkojima@gcc.gnu.org>
* config/m32r/constraints.md: New file.
......
......@@ -771,18 +771,34 @@ const struct mips_cpu_info mips_cpu_info_table[] = {
{ "4kec", PROCESSOR_4KC, 33 },
{ "4kem", PROCESSOR_4KC, 33 },
{ "4kep", PROCESSOR_4KP, 33 },
{ "24kc", PROCESSOR_24KC, 33 }, /* 24K no FPU */
{ "24kf", PROCESSOR_24KF, 33 }, /* 24K 1:2 FPU */
{ "24kx", PROCESSOR_24KX, 33 }, /* 24K 1:1 FPU */
{ "24kc", PROCESSOR_24KC, 33 },
{ "24kf2_1", PROCESSOR_24KF2_1, 33 },
{ "24kf", PROCESSOR_24KF2_1, 33 },
{ "24kf1_1", PROCESSOR_24KF1_1, 33 },
{ "24kfx", PROCESSOR_24KF1_1, 33 },
{ "24kx", PROCESSOR_24KF1_1, 33 },
{ "24kec", PROCESSOR_24KC, 33 }, /* 24K with DSP */
{ "24kef", PROCESSOR_24KF, 33 },
{ "24kex", PROCESSOR_24KX, 33 },
{ "34kc", PROCESSOR_24KC, 33 }, /* 34K with MT/DSP */
{ "34kf", PROCESSOR_24KF, 33 },
{ "34kx", PROCESSOR_24KX, 33 },
{ "74kc", PROCESSOR_74KC, 33 },
{ "74kf", PROCESSOR_74KF, 33 },
{ "74kx", PROCESSOR_74KX, 33 },
{ "24kef2_1", PROCESSOR_24KF2_1, 33 },
{ "24kef", PROCESSOR_24KF2_1, 33 },
{ "24kef1_1", PROCESSOR_24KF1_1, 33 },
{ "24kefx", PROCESSOR_24KF1_1, 33 },
{ "24kex", PROCESSOR_24KF1_1, 33 },
{ "34kc", PROCESSOR_24KC, 33 }, /* 34K with MT/DSP */
{ "34kf2_1", PROCESSOR_24KF2_1, 33 },
{ "34kf", PROCESSOR_24KF2_1, 33 },
{ "34kf1_1", PROCESSOR_24KF1_1, 33 },
{ "34kfx", PROCESSOR_24KF1_1, 33 },
{ "34kx", PROCESSOR_24KF1_1, 33 },
{ "74kc", PROCESSOR_74KC, 33 }, /* 74K with DSPr2 */
{ "74kf2_1", PROCESSOR_74KF2_1, 33 },
{ "74kf", PROCESSOR_74KF2_1, 33 },
{ "74kf1_1", PROCESSOR_74KF1_1, 33 },
{ "74kfx", PROCESSOR_74KF1_1, 33 },
{ "74kx", PROCESSOR_74KF1_1, 33 },
/* MIPS64 */
{ "5kc", PROCESSOR_5KC, 64 },
......@@ -901,7 +917,7 @@ static struct mips_rtx_cost_data const mips_rtx_cost_data[PROCESSOR_MAX] =
1, /* branch_cost */
4 /* memory_latency */
},
{ /* 24KF */
{ /* 24KF2_1 */
COSTS_N_INSNS (8), /* fp_add */
COSTS_N_INSNS (8), /* fp_mult_sf */
COSTS_N_INSNS (10), /* fp_mult_df */
......@@ -914,7 +930,7 @@ static struct mips_rtx_cost_data const mips_rtx_cost_data[PROCESSOR_MAX] =
1, /* branch_cost */
4 /* memory_latency */
},
{ /* 24KX */
{ /* 24KF1_1 */
COSTS_N_INSNS (4), /* fp_add */
COSTS_N_INSNS (4), /* fp_mult_sf */
COSTS_N_INSNS (5), /* fp_mult_df */
......@@ -936,7 +952,7 @@ static struct mips_rtx_cost_data const mips_rtx_cost_data[PROCESSOR_MAX] =
1, /* branch_cost */
4 /* memory_latency */
},
{ /* 74KF */
{ /* 74KF2_1 */
COSTS_N_INSNS (8), /* fp_add */
COSTS_N_INSNS (8), /* fp_mult_sf */
COSTS_N_INSNS (10), /* fp_mult_df */
......@@ -949,7 +965,7 @@ static struct mips_rtx_cost_data const mips_rtx_cost_data[PROCESSOR_MAX] =
1, /* branch_cost */
4 /* memory_latency */
},
{ /* 74KX */
{ /* 74KF1_1 */
COSTS_N_INSNS (4), /* fp_add */
COSTS_N_INSNS (4), /* fp_mult_sf */
COSTS_N_INSNS (5), /* fp_mult_df */
......@@ -10780,8 +10796,8 @@ mips_issue_rate (void)
switch (mips_tune)
{
case PROCESSOR_74KC:
case PROCESSOR_74KF:
case PROCESSOR_74KX:
case PROCESSOR_74KF2_1:
case PROCESSOR_74KF1_1:
case PROCESSOR_R4130:
case PROCESSOR_R5400:
case PROCESSOR_R5500:
......
......@@ -41,11 +41,11 @@ enum processor_type {
PROCESSOR_5KF,
PROCESSOR_20KC,
PROCESSOR_24KC,
PROCESSOR_24KF,
PROCESSOR_24KX,
PROCESSOR_24KF2_1,
PROCESSOR_24KF1_1,
PROCESSOR_74KC,
PROCESSOR_74KF,
PROCESSOR_74KX,
PROCESSOR_74KF2_1,
PROCESSOR_74KF1_1,
PROCESSOR_M4K,
PROCESSOR_R3900,
PROCESSOR_R6000,
......@@ -249,8 +249,8 @@ extern const struct mips_rtx_cost_data *mips_cost;
#define TUNE_SB1 (mips_tune == PROCESSOR_SB1 \
|| mips_tune == PROCESSOR_SB1A)
#define TUNE_74K (mips_tune == PROCESSOR_74KC \
|| mips_tune == PROCESSOR_74KF \
|| mips_tune == PROCESSOR_74KX)
|| mips_tune == PROCESSOR_74KF2_1 \
|| mips_tune == PROCESSOR_74KF1_1)
/* True if the pre-reload scheduler should try to create chains of
multiply-add or multiply-subtract instructions. For example,
......
......@@ -397,7 +397,7 @@
;; Attribute describing the processor. This attribute must match exactly
;; with the processor_type enumeration in mips.h.
(define_attr "cpu"
"r3000,4kc,4kp,5kc,5kf,20kc,24kc,24kf,24kx,74kc,74kf,74kx,m4k,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,sb1,sb1a,sr71000"
"r3000,4kc,4kp,5kc,5kf,20kc,24kc,24kf2_1,24kf1_1,74kc,74kf2_1,74kf1_1,m4k,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,sb1,sb1a,sr71000"
(const (symbol_ref "mips_tune")))
;; The type of hardware hazard associated with this instruction.
......
......@@ -11425,10 +11425,10 @@ The processor names are:
@samp{4kec}, @samp{4kem}, @samp{4kep},
@samp{5kc}, @samp{5kf},
@samp{20kc},
@samp{24kc}, @samp{24kf}, @samp{24kx},
@samp{24kec}, @samp{24kef}, @samp{24kex},
@samp{34kc}, @samp{34kf}, @samp{34kx},
@samp{74kc}, @samp{74kf}, @samp{74kx},
@samp{24kc}, @samp{24kf2_1}, @samp{24kf1_1},
@samp{24kec}, @samp{24kef2_1}, @samp{24kef1_1},
@samp{34kc}, @samp{34kf2_1}, @samp{34kf1_1},
@samp{74kc}, @samp{74kf2_1}, @samp{74kf1_1},
@samp{m4k},
@samp{orion},
@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
......@@ -11446,6 +11446,13 @@ In processor names, a final @samp{000} can be abbreviated as @samp{k}
(for example, @samp{-march=r2k}). Prefixes are optional, and
@samp{vr} may be written @samp{r}.
Names of the form @samp{@var{n}f2_1} refer to processors with
FPUs clocked at half the rate of the core. Names of the form
@samp{@var{n}f1_1} refer to processors with FPUs clocked at the same
rate as the core. For compatibility reasons, @samp{@var{n}f} is
accepted as a synonym for @samp{@var{n}f2_1} while @samp{@var{n}x} and
@samp{@var{b}fx} are accepted as synonyms for @samp{@var{n}f1_1}.
GCC defines two macros based on the value of this option. The first
is @samp{_MIPS_ARCH}, which gives the name of target architecture, as
a string. The second has the form @samp{_MIPS_ARCH_@var{foo}},
......
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