MMX/SSE builtin support

From-SVN: r36487

gcc/ChangeLog

@@ -2,6 +2,23 @@
 
 	* optabs.c (emit_libcall_block): Set CONST_CALL_P for the call.
 
+	* i386-protos.h (ix86_init_builtins, ix86_expand_builtin): Declare.
+	* i386.c (struct builtin_description): New.
+	(bdesc_comi, bdesc_2arg, bdesc_1arg): New arrays.
+	(mmx_reg_operand): Declare MODE arg as unused.
+	(ix86_expand_sse_comi, ix86_expand_sse_compare, safe_vector_operand,
+	ix86_expand_unop1_builtin, ix86_expand_unop_builtin,
+	ix86_expand_binop_builtin, ix86_expand_store_builtin,
+	ix86_init_builtins, ix86_expand_builtin): New functions.
+	* i386.h (ix86_builtins): New enumeration.
+	(MD_INIT_BUILTINS, MD_EXPAND_BUILTIN): New macros.
+	* i386.md (attr length_immediate): 0 for mmx/sse types.
+	(attr prefix_0f): 1 for mmx/sse types.
+	(setcc_2): Remove "*" so we get gen_setcc_2.
+	(emms): Account for changed register numbering.  Set "memory" attr
+	to unknown.
+	(sfence): Set "memory" attr to unknown.
+
 2000-09-18  Andreas Jaeger  <aj@suse.de>
 
 	* configure.in: Define _GNU_SOURCE only when using the GNU C

gcc/config/i386/i386-protos.h

@@ -131,6 +131,8 @@ extern void init_cumulative_args PARAMS ((CUMULATIVE_ARGS *, tree, rtx));
 extern rtx function_arg PARAMS ((CUMULATIVE_ARGS *, enum machine_mode, tree, int));
 extern void function_arg_advance PARAMS ((CUMULATIVE_ARGS *, enum machine_mode,
 					tree, int));
+extern void ix86_init_builtins PARAMS ((void));
+extern rtx ix86_expand_builtin PARAMS ((tree, rtx, rtx, enum machine_mode, int));
 #endif
 
 #endif

gcc/config/i386/i386.h

@@ -1721,6 +1721,222 @@ pop{l} %0"							\
 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)	\
  if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
 
+/* Codes for all the SSE/MMX builtins.  */
+enum ix86_builtins
+{
+  IX86_BUILTIN_ADDPS,
+  IX86_BUILTIN_ADDSS,
+  IX86_BUILTIN_DIVPS,
+  IX86_BUILTIN_DIVSS,
+  IX86_BUILTIN_MULPS,
+  IX86_BUILTIN_MULSS,
+  IX86_BUILTIN_SUBPS,
+  IX86_BUILTIN_SUBSS,
+
+  IX86_BUILTIN_CMPEQPS,
+  IX86_BUILTIN_CMPLTPS,
+  IX86_BUILTIN_CMPLEPS,
+  IX86_BUILTIN_CMPGTPS,
+  IX86_BUILTIN_CMPGEPS,
+  IX86_BUILTIN_CMPNEQPS,
+  IX86_BUILTIN_CMPNLTPS,
+  IX86_BUILTIN_CMPNLEPS,
+  IX86_BUILTIN_CMPNGTPS,
+  IX86_BUILTIN_CMPNGEPS,
+  IX86_BUILTIN_CMPORDPS,
+  IX86_BUILTIN_CMPUNORDPS,
+  IX86_BUILTIN_CMPNEPS,
+  IX86_BUILTIN_CMPEQSS,
+  IX86_BUILTIN_CMPLTSS,
+  IX86_BUILTIN_CMPLESS,
+  IX86_BUILTIN_CMPGTSS,
+  IX86_BUILTIN_CMPGESS,
+  IX86_BUILTIN_CMPNEQSS,
+  IX86_BUILTIN_CMPNLTSS,
+  IX86_BUILTIN_CMPNLESS,
+  IX86_BUILTIN_CMPNGTSS,
+  IX86_BUILTIN_CMPNGESS,
+  IX86_BUILTIN_CMPORDSS,
+  IX86_BUILTIN_CMPUNORDSS,
+  IX86_BUILTIN_CMPNESS,
+
+  IX86_BUILTIN_COMIEQSS,
+  IX86_BUILTIN_COMILTSS,
+  IX86_BUILTIN_COMILESS,
+  IX86_BUILTIN_COMIGTSS,
+  IX86_BUILTIN_COMIGESS,
+  IX86_BUILTIN_COMINEQSS,
+  IX86_BUILTIN_UCOMIEQSS,
+  IX86_BUILTIN_UCOMILTSS,
+  IX86_BUILTIN_UCOMILESS,
+  IX86_BUILTIN_UCOMIGTSS,
+  IX86_BUILTIN_UCOMIGESS,
+  IX86_BUILTIN_UCOMINEQSS,
+
+  IX86_BUILTIN_CVTPI2PS,
+  IX86_BUILTIN_CVTPS2PI,
+  IX86_BUILTIN_CVTSI2SS,
+  IX86_BUILTIN_CVTSS2SI,
+  IX86_BUILTIN_CVTTPS2PI,
+  IX86_BUILTIN_CVTTSS2SI,
+  IX86_BUILTIN_M_FROM_INT,
+  IX86_BUILTIN_M_TO_INT,
+
+  IX86_BUILTIN_MAXPS,
+  IX86_BUILTIN_MAXSS,
+  IX86_BUILTIN_MINPS,
+  IX86_BUILTIN_MINSS,
+
+  IX86_BUILTIN_LOADAPS,
+  IX86_BUILTIN_LOADUPS,
+  IX86_BUILTIN_STOREAPS,
+  IX86_BUILTIN_STOREUPS,
+  IX86_BUILTIN_LOADSS,
+  IX86_BUILTIN_STORESS,
+  IX86_BUILTIN_MOVSS,
+
+  IX86_BUILTIN_MOVHLPS,
+  IX86_BUILTIN_MOVLHPS,
+  IX86_BUILTIN_LOADHPS,
+  IX86_BUILTIN_LOADLPS,
+  IX86_BUILTIN_STOREHPS,
+  IX86_BUILTIN_STORELPS,
+
+  IX86_BUILTIN_MASKMOVQ,
+  IX86_BUILTIN_MOVMSKPS,
+  IX86_BUILTIN_PMOVMSKB,
+
+  IX86_BUILTIN_MOVNTPS,
+  IX86_BUILTIN_MOVNTQ,
+
+  IX86_BUILTIN_PACKSSWB,
+  IX86_BUILTIN_PACKSSDW,
+  IX86_BUILTIN_PACKUSWB,
+
+  IX86_BUILTIN_PADDB,
+  IX86_BUILTIN_PADDW,
+  IX86_BUILTIN_PADDD,
+  IX86_BUILTIN_PADDSB,
+  IX86_BUILTIN_PADDSW,
+  IX86_BUILTIN_PADDUSB,
+  IX86_BUILTIN_PADDUSW,
+  IX86_BUILTIN_PSUBB,
+  IX86_BUILTIN_PSUBW,
+  IX86_BUILTIN_PSUBD,
+  IX86_BUILTIN_PSUBSB,
+  IX86_BUILTIN_PSUBSW,
+  IX86_BUILTIN_PSUBUSB,
+  IX86_BUILTIN_PSUBUSW,
+
+  IX86_BUILTIN_PAND,
+  IX86_BUILTIN_PANDN,
+  IX86_BUILTIN_POR,
+  IX86_BUILTIN_PXOR,
+
+  IX86_BUILTIN_PAVGB,
+  IX86_BUILTIN_PAVGW,
+
+  IX86_BUILTIN_PCMPEQB,
+  IX86_BUILTIN_PCMPEQW,
+  IX86_BUILTIN_PCMPEQD,
+  IX86_BUILTIN_PCMPGTB,
+  IX86_BUILTIN_PCMPGTW,
+  IX86_BUILTIN_PCMPGTD,
+
+  IX86_BUILTIN_PEXTRW,
+  IX86_BUILTIN_PINSRW,
+
+  IX86_BUILTIN_PMADDWD,
+
+  IX86_BUILTIN_PMAXSW,
+  IX86_BUILTIN_PMAXUB,
+  IX86_BUILTIN_PMINSW,
+  IX86_BUILTIN_PMINUB,
+
+  IX86_BUILTIN_PMULHUW,
+  IX86_BUILTIN_PMULHW,
+  IX86_BUILTIN_PMULLW,
+
+  IX86_BUILTIN_PSADBW,
+  IX86_BUILTIN_PSHUFW,
+
+  IX86_BUILTIN_PSLLW,
+  IX86_BUILTIN_PSLLD,
+  IX86_BUILTIN_PSLLQ,
+  IX86_BUILTIN_PSRAW,
+  IX86_BUILTIN_PSRAD,
+  IX86_BUILTIN_PSRLW,
+  IX86_BUILTIN_PSRLD,
+  IX86_BUILTIN_PSRLQ,
+  IX86_BUILTIN_PSLLWI,
+  IX86_BUILTIN_PSLLDI,
+  IX86_BUILTIN_PSLLQI,
+  IX86_BUILTIN_PSRAWI,
+  IX86_BUILTIN_PSRADI,
+  IX86_BUILTIN_PSRLWI,
+  IX86_BUILTIN_PSRLDI,
+  IX86_BUILTIN_PSRLQI,
+
+  IX86_BUILTIN_PUNPCKHBW,
+  IX86_BUILTIN_PUNPCKHWD,
+  IX86_BUILTIN_PUNPCKHDQ,
+  IX86_BUILTIN_PUNPCKLBW,
+  IX86_BUILTIN_PUNPCKLWD,
+  IX86_BUILTIN_PUNPCKLDQ,
+
+  IX86_BUILTIN_SHUFPS,
+
+  IX86_BUILTIN_RCPPS,
+  IX86_BUILTIN_RCPSS,
+  IX86_BUILTIN_RSQRTPS,
+  IX86_BUILTIN_RSQRTSS,
+  IX86_BUILTIN_SQRTPS,
+  IX86_BUILTIN_SQRTSS,
+  
+  IX86_BUILTIN_UNPCKHPS,
+  IX86_BUILTIN_UNPCKLPS,
+
+  IX86_BUILTIN_ANDPS,
+  IX86_BUILTIN_ANDNPS,
+  IX86_BUILTIN_ORPS,
+  IX86_BUILTIN_XORPS,
+
+  IX86_BUILTIN_EMMS,
+  IX86_BUILTIN_LDMXCSR,
+  IX86_BUILTIN_STMXCSR,
+  IX86_BUILTIN_SFENCE,
+  IX86_BUILTIN_PREFETCH,
+
+  /* Composite builtins, expand to more than one insn.  */
+  IX86_BUILTIN_SETPS1,
+  IX86_BUILTIN_SETPS,
+  IX86_BUILTIN_CLRPS,
+  IX86_BUILTIN_SETRPS,
+  IX86_BUILTIN_LOADPS1,
+  IX86_BUILTIN_LOADRPS,
+  IX86_BUILTIN_STOREPS1,
+  IX86_BUILTIN_STORERPS,
+
+  IX86_BUILTIN_MMX_ZERO,
+
+  IX86_BUILTIN_MAX
+};
+
+/* Initialize the target-specific builtin functions.  Only do something
+   if TARGET_MMX is nonzero; we take care in ix86_init_builtins not to
+   enable any SSE builtins if TARGET_SSE is zero.  */
+#define MD_INIT_BUILTINS	\
+  do				\
+    {				\
+      if (TARGET_MMX)		\
+	ix86_init_builtins ();	\
+    }				\
+  while (0)
+
+/* Expand a target-specific builtin function.  */
+#define MD_EXPAND_BUILTIN(EXP, TARGET, SUBTARGET, MODE, IGNORE) \
+  ix86_expand_builtin (EXP, TARGET, SUBTARGET, MODE, IGNORE)
+
 /* Define this macro if references to a symbol must be treated
    differently depending on something about the variable or
    function named by the symbol (such as what section it is in).

gcc/config/i386/i386.md

@@ -117,7 +117,7 @@
 
 ;; The (bounding maximum) length of an instruction immediate.
 (define_attr "length_immediate" ""
-  (cond [(eq_attr "type" "incdec,setcc,icmov,ibr,str,cld,lea,other,multi,idiv")
+  (cond [(eq_attr "type" "incdec,setcc,icmov,ibr,str,cld,lea,other,multi,idiv,sse,mmx")
 	   (const_int 0)
 	 (eq_attr "i387" "1")
 	   (const_int 0)
@@ -167,7 +167,7 @@
 
 ;; Set when 0f opcode prefix is used.
 (define_attr "prefix_0f" ""
-  (if_then_else (eq_attr "type" "imovx,setcc,icmov")
+  (if_then_else (eq_attr "type" "imovx,setcc,icmov,sse,mmx")
     (const_int 1)
     (const_int 0)))
 
@@ -8311,7 +8311,7 @@
   [(set_attr "type" "setcc")
    (set_attr "mode" "QI")])
 
-(define_insn "*setcc_2"
+(define_insn "setcc_2"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
 	(match_operator:QI 1 "ix86_comparison_operator"
 	  [(reg 17) (const_int 0)]))]
@@ -13068,17 +13068,18 @@
    (clobber (reg:XF 13))
    (clobber (reg:XF 14))
    (clobber (reg:XF 15))
-   (clobber (reg:DI 27))
-   (clobber (reg:DI 28))
    (clobber (reg:DI 29))
    (clobber (reg:DI 30))
    (clobber (reg:DI 31))
    (clobber (reg:DI 32))
    (clobber (reg:DI 33))
-   (clobber (reg:DI 34))]
+   (clobber (reg:DI 34))
+   (clobber (reg:DI 35))
+   (clobber (reg:DI 36))]
   "TARGET_MMX"
   "emms"
-  [(set_attr "type" "mmx")])
+  [(set_attr "type" "mmx")
+   (set_attr "memory" "unknown")])
 
 (define_insn "ldmxcsr"
   [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] 37)]
@@ -13108,7 +13109,8 @@
 	(unspec:BLK [(match_dup 0)] 44))]
   "TARGET_SSE"
   "sfence"
-  [(set_attr "type" "sse")])
+  [(set_attr "type" "sse")
+   (set_attr "memory" "unknown")])
 
 (define_insn "prefetch"
   [(unspec [(match_operand:SI 0 "address_operand" "p")