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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
bd78000b
Commit
bd78000b
authored
May 02, 2001
by
Mark Mitchell
Committed by
Mark Mitchell
May 02, 2001
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* extend.texi: Fix typo.
From-SVN: r41749
parent
bcecb0b0
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gcc/ChangeLog
+4
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gcc/extend.texi
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gcc/ChangeLog
View file @
bd78000b
2001
-
05
-
01
Mark
Mitchell
<
mark
@codesourcery
.
com
>
*
extend
.
texi
:
Fix
typo
.
2001
-
05
-
01
Stan
Shebs
<
shebs
@apple
.
com
>
*
objc
/
objc
-
act
.
c
(
build_module_descriptor
)
:
Clear
DECL_CONTEXT
...
...
gcc/extend.texi
View file @
bd78000b
...
...
@@ -3062,7 +3062,7 @@ instruction.) In addition, GCC will not reschedule instructions
across
a
volatile
@
code
{
asm
}
instruction
.
For
example
:
@
example
(
volatile
int
*)
addr
=
foo
;
*
(
volatile
int
*)
addr
=
foo
;
asm
volatile
(
"eieio"
:
:
);
@
end
example
...
...
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