Commit bc8a6d63 by Richard Henderson Committed by Richard Henderson

i386.md (addsi_1_zext splitter): Add TARGET_64BIT to the conditional.

        * config/i386/i386.md (addsi_1_zext splitter): Add TARGET_64BIT
        to the conditional.
        (ashlsi3_1_zext splitter): Likewise.

From-SVN: r62254
parent 2928cd7a
2003-02-01 Richard Henderson <rth@redhat.com> 2003-02-01 Richard Henderson <rth@redhat.com>
* config/i386/i386.md (addsi_1_zext splitter): Add TARGET_64BIT
to the conditional.
(ashlsi3_1_zext splitter): Likewise.
2003-02-01 Richard Henderson <rth@redhat.com>
* optabs.c (expand_unop): Use word_mode for outmode of bit scaners. * optabs.c (expand_unop): Use word_mode for outmode of bit scaners.
* libgcc2.c (__ffsdi2, __clzsi2, __clzdi2, __ctzsi2, __ctzdi2, * libgcc2.c (__ffsdi2, __clzsi2, __clzdi2, __ctzsi2, __ctzdi2,
__popcountsi2, __popcountdi2, __paritysi2 __paritydi2): Change __popcountsi2, __popcountdi2, __paritysi2 __paritydi2): Change
......
...@@ -5677,7 +5677,7 @@ ...@@ -5677,7 +5677,7 @@
(plus:SI (match_operand:SI 1 "register_operand" "") (plus:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" "")))) (match_operand:SI 2 "nonmemory_operand" ""))))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"reload_completed "TARGET_64BIT && reload_completed
&& true_regnum (operands[0]) != true_regnum (operands[1])" && true_regnum (operands[0]) != true_regnum (operands[1])"
[(set (match_dup 0) [(set (match_dup 0)
(zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))] (zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
...@@ -11104,9 +11104,11 @@ ...@@ -11104,9 +11104,11 @@
(zero_extend:DI (ashift (match_operand 1 "register_operand" "") (zero_extend:DI (ashift (match_operand 1 "register_operand" "")
(match_operand:QI 2 "const_int_operand" "")))) (match_operand:QI 2 "const_int_operand" ""))))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"reload_completed "TARGET_64BIT && reload_completed
&& true_regnum (operands[0]) != true_regnum (operands[1])" && true_regnum (operands[0]) != true_regnum (operands[1])"
[(set (match_dup 0) (zero_extend:DI (subreg:SI (mult:SI (match_dup 1) (match_dup 2)) 0)))] [(set (match_dup 0) (zero_extend:DI
(subreg:SI (mult:SI (match_dup 1)
(match_dup 2)) 0)))]
{ {
operands[1] = gen_lowpart (Pmode, operands[1]); operands[1] = gen_lowpart (Pmode, operands[1]);
operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode); operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode);
......
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