Skip to content

R
riscv-gcc-1
Commit bbe57e1e by Carl Love Committed by Carl Love
Options

rs6000-builtin.def: Change NEG macro expansions from BU_ALTIVEC_A to BU_P8V_AV_1 and... 

gcc/ChangeLog:

2018-02-19  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-builtin.def: Change NEG macro expansions from
	BU_ALTIVEC_A to BU_P8V_AV_1 and BU_ALTIVEC_OVERLOAD_1 to
	BU_P8V_OVERLOAD_1.
	* config/rs6000/rs6000-c.c: Change ALTIVEC_BUILTIN_VEC_NEG to
	P8V_BUILTIN_VEC_NEG.

gcc/testsuite/ChangeLog:

2018-02-19  Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/fold-vec-neg-int.p7.c: Remove test file.

From-SVN: r257812
parent e0479b58
Showing with 35 additions and 22 deletions
gcc/ChangeLog
2018-02-19 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-builtin.def: Change NEG macro expansions from
BU_ALTIVEC_A to BU_P8V_AV_1 and BU_ALTIVEC_OVERLOAD_1 to
BU_P8V_OVERLOAD_1.
* config/rs6000/rs6000-c.c: Change ALTIVEC_BUILTIN_VEC_NEG to
P8V_BUILTIN_VEC_NEG.
2018-02-19 Sebastian Perta <sebastian.perta@renesas.com>
* config/rl78/rl78.md (movdf): New define expand.
......
gcc/config/rs6000/rs6000-builtin.def
......@@ -1162,14 +1162,6 @@ BU_ALTIVEC_A (NABS_V16QI, "nabs_v16qi", CONST, nabsv16qi2)
BU_ALTIVEC_A (NABS_V4SF, "nabs_v4sf", CONST, vsx_nabsv4sf2)
BU_ALTIVEC_A (NABS_V2DF, "nabs_v2df", CONST, vsx_nabsv2df2)
/* Altivec NEG functions. */
BU_ALTIVEC_A (NEG_V2DI, "neg_v2di", CONST, negv2di2)
BU_ALTIVEC_A (NEG_V4SI, "neg_v4si", CONST, negv4si2)
BU_ALTIVEC_A (NEG_V8HI, "neg_v8hi", CONST, negv8hi2)
BU_ALTIVEC_A (NEG_V16QI, "neg_v16qi", CONST, negv16qi2)
BU_ALTIVEC_A (NEG_V4SF, "neg_v4sf", CONST, negv4sf2)
BU_ALTIVEC_A (NEG_V2DF, "neg_v2df", CONST, negv2df2)
/* 1 argument Altivec builtin functions. */
BU_ALTIVEC_1 (VEXPTEFP, "vexptefp", FP, altivec_vexptefp)
BU_ALTIVEC_1 (VLOGEFP, "vlogefp", FP, altivec_vlogefp)
......@@ -1469,7 +1461,6 @@ BU_ALTIVEC_OVERLOAD_1 (FLOOR, "floor")
BU_ALTIVEC_OVERLOAD_1 (LOGE, "loge")
BU_ALTIVEC_OVERLOAD_1 (MTVSCR, "mtvscr")
BU_ALTIVEC_OVERLOAD_1 (NEARBYINT, "nearbyint")
BU_ALTIVEC_OVERLOAD_1 (NEG, "neg")
BU_ALTIVEC_OVERLOAD_1 (RE, "re")
BU_ALTIVEC_OVERLOAD_1 (RINT, "rint")
BU_ALTIVEC_OVERLOAD_1 (ROUND, "round")
......@@ -1913,6 +1904,15 @@ BU_P8V_VSX_1 (REVB_V16QI, "revb_v16qi", CONST, revb_v16qi)
BU_P8V_VSX_1 (REVB_V2DF, "revb_v2df", CONST, revb_v2df)
BU_P8V_VSX_1 (REVB_V4SF, "revb_v4sf", CONST, revb_v4sf)
/* Power 8 Altivec NEG functions. */
BU_P8V_AV_1 (NEG_V2DI, "neg_v2di", CONST, negv2di2)
BU_P8V_AV_1 (NEG_V4SI, "neg_v4si", CONST, negv4si2)
BU_P8V_AV_1 (NEG_V8HI, "neg_v8hi", CONST, negv8hi2)
BU_P8V_AV_1 (NEG_V16QI, "neg_v16qi", CONST, negv16qi2)
BU_P8V_AV_1 (NEG_V4SF, "neg_v4sf", CONST, negv4sf2)
BU_P8V_AV_1 (NEG_V2DF, "neg_v2df", CONST, negv2df2)
/* 2 argument VSX instructions added in ISA 2.07. */
BU_P8V_VSX_2 (FLOAT2_V2DF, "float2_v2df", CONST, float2_v2df)
BU_P8V_VSX_2 (FLOAT2_V2DI, "float2_v2di", CONST, float2_v2di)
......@@ -2033,6 +2033,7 @@ BU_P8V_OVERLOAD_1 (VPOPCNTUW, "vpopcntuw")
BU_P8V_OVERLOAD_1 (VPOPCNTUD, "vpopcntud")
BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd")
BU_P8V_OVERLOAD_1 (REVB, "revb")
BU_P8V_OVERLOAD_1 (NEG, "neg")
/* ISA 2.07 vector overloaded 2 argument functions. */
BU_P8V_OVERLOAD_2 (EQV, "eqv")
......
gcc/config/rs6000/rs6000-c.c
......@@ -2291,19 +2291,6 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
{ ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V16QI,
RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V8HI,
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V4SI,
RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V2DI,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V4SF,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V2DF,
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
......@@ -2429,6 +2416,19 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
{ ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,
RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
{ P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V16QI,
RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
{ P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V8HI,
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
{ P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SI,
RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
{ P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DI,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
{ P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SF,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
{ P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DF,
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
{ P9V_BUILTIN_VEC_CONVERT_4F32_8I16, P9V_BUILTIN_CONVERT_4F32_8I16,
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
......
gcc/testsuite/ChangeLog
2018-02-19 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/fold-vec-neg-int.p7.c: Remove test file.
2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
PR target/84460
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment