x86: Mark scratch operand in ssse3_pshufbv8qi3 as earlyclobber
commit 16ed2601 Author: H.J. Lu <hongjiu.lu@intel.com> Date: Wed May 15 15:26:19 2019 +0000 i386: Emulate MMX pshufb with SSE version has +(define_insn_and_split "ssse3_pshufbv8qi3" + [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv") + (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "0,0,Yv") + (match_operand:V8QI 2 "register_mmxmem_operand" "ym,x,Yv")] + UNSPEC_PSHUFB)) + (clobber (match_scratch:V4SI 3 "=X,x,Yv"))] ^^^ There are earlyclobber. + "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3" + "@ + pshufb\t{%2, %0|%0, %2} + # + #" + "TARGET_MMX_WITH_SSE && reload_completed" + [(set (match_dup 3) (match_dup 5)) + (set (match_dup 3) + (and:V4SI (match_dup 3) (match_dup 2))) + (set (match_dup 0) + (unspec:V16QI [(match_dup 1) (match_dup 4)] UNSPEC_PSHUFB))] If input register operand 2 is dead after this insn, RA may choose it as scratch operand. Since it isn't marked as earlyclobber, operand 2 becomes unused after split and then it gets optimized out. Mark scratch operand as earlyclobber fixes the issue. gcc/ PR target/94467 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand as earlyclobber. gcc/testsuite/ PR target/94467 * gcc.target/i386/pr94467-1.c: New test. * gcc.target/i386/pr94467-2.c: Likewise.
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gcc/testsuite/gcc.target/i386/pr94467-1.c
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gcc/testsuite/gcc.target/i386/pr94467-2.c
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