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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
bb21487f
Commit
bb21487f
authored
Jul 08, 1997
by
Michael Meissner
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Use unsigned HOST_WIDE_INT, not unsigned.
From-SVN: r14402
parent
7834ab39
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gcc/config/rs6000/rs6000.md
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gcc/config/rs6000/rs6000.md
View file @
bb21487f
...
@@ -1671,6 +1671,7 @@
...
@@ -1671,6 +1671,7 @@
"bla __quous"
"bla __quous"
[
(set_attr "type" "idiv")
]
)
[
(set_attr "type" "idiv")
]
)
;; Logical instructions
(define_insn "andsi3"
(define_insn "andsi3"
[
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")
[
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")
(and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r")
(and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r")
...
@@ -5225,7 +5226,7 @@
...
@@ -5225,7 +5226,7 @@
(define_split
(define_split
[
(set (match_operand:SI 0 "gpc_reg_operand" "")
[
(set (match_operand:SI 0 "gpc_reg_operand" "")
(match_operand:SI 1 "const_int_operand" ""))]
(match_operand:SI 1 "const_int_operand" ""))]
"(unsigned) (INTVAL (operands
[
1
]
) + 0x8000) >= 0x10000
"(unsigned
HOST_WIDE_INT
) (INTVAL (operands
[
1
]
) + 0x8000) >= 0x10000
&& (INTVAL (operands
[
1
]
) & 0xffff) != 0"
&& (INTVAL (operands
[
1
]
) & 0xffff) != 0"
[
(set (match_dup 0)
[
(set (match_dup 0)
(match_dup 2))
(match_dup 2))
...
...
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