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riscv-gcc-1
Commit bb14e228 by Richard Kenner
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(extv, extzv): In patterns that will use movb and movw, ensure size is 

8 or 16.

From-SVN: r7814
parent 1c63cc82
Showing with 2 additions and 0 deletions
gcc/config/m68k/m68k.md
...@@ -3798,6 +3798,7 @@ ...@@ -3798,6 +3798,7 @@
(match_operand:SI 2 "const_int_operand" "n") (match_operand:SI 2 "const_int_operand" "n")
(match_operand:SI 3 "const_int_operand" "n")))] (match_operand:SI 3 "const_int_operand" "n")))]
"TARGET_68020 && TARGET_BITFIELD "TARGET_68020 && TARGET_BITFIELD
&& (INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0 && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
&& (GET_CODE (operands[1]) == REG && (GET_CODE (operands[1]) == REG
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))" || ! mode_dependent_address_p (XEXP (operands[1], 0)))"
...@@ -3851,6 +3852,7 @@ ...@@ -3851,6 +3852,7 @@
(match_operand:SI 2 "const_int_operand" "n") (match_operand:SI 2 "const_int_operand" "n")
(match_operand:SI 3 "const_int_operand" "n")))] (match_operand:SI 3 "const_int_operand" "n")))]
"TARGET_68020 && TARGET_BITFIELD "TARGET_68020 && TARGET_BITFIELD
&& (INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0 && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
&& (GET_CODE (operands[1]) == REG && (GET_CODE (operands[1]) == REG
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))" || ! mode_dependent_address_p (XEXP (operands[1], 0)))"
......
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