re PR target/56866 (with '-O3 -march=bdver2' misscompiles glibc-2.17/crypt/sha512.c)

	PR target/56866
	* config/i386/i386.c (ix86_expand_mul_widen_evenodd): Don't
	use xop_pmacsdqh if uns_p.
	* config/i386/sse.md (xop_rotr<mode>3): Fix up computation of
	the immediate rotate count.

	* gcc.c-torture/execute/pr56866.c: New test.
	* gcc.target/i386/pr56866.c: New test.

From-SVN: r198355

gcc/ChangeLog

+2013-04-27  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/56866
+	* config/i386/i386.c (ix86_expand_mul_widen_evenodd): Don't
+	use xop_pmacsdqh if uns_p.
+	* config/i386/sse.md (xop_rotr<mode>3): Fix up computation of
+	the immediate rotate count.
+
 2013-04-26  Vladimir Makarov  <vmakarov@redhat.com>
 
 	* rtl.h (struct rtx_def): Add comment for field jump.

gcc/config/i386/i386.c

@@ -40841,7 +40841,9 @@ ix86_expand_mul_widen_evenodd (rtx dest, rtx op1, rtx op2,
      the even slots.  For some cpus this is faster than a PSHUFD.  */
   if (odd_p)
     {
-      if (TARGET_XOP && mode == V4SImode)
+      /* For XOP use vpmacsdqh, but only for smult, as it is only
+	 signed.  */
+      if (TARGET_XOP && mode == V4SImode && !uns_p)
 	{
 	  x = force_reg (wmode, CONST0_RTX (wmode));
 	  emit_insn (gen_xop_pmacsdqh (dest, op1, op2, x));

gcc/config/i386/sse.md

@@ -9924,7 +9924,8 @@
 	 (match_operand:SI 2 "const_0_to_<sserotatemax>_operand" "n")))]
   "TARGET_XOP"
 {
-  operands[3] = GEN_INT ((<ssescalarnum> * 8) - INTVAL (operands[2]));
+  operands[3]
+    = GEN_INT (GET_MODE_BITSIZE (<ssescalarmode>mode) - INTVAL (operands[2]));
   return \"vprot<ssemodesuffix>\t{%3, %1, %0|%0, %1, %3}\";
 }
   [(set_attr "type" "sseishft")

gcc/testsuite/ChangeLog

+2013-04-27  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/56866
+	* gcc.c-torture/execute/pr56866.c: New test.
+	* gcc.target/i386/pr56866.c: New test.
+
 2013-04-26  Jakub Jelinek  <jakub@redhat.com>
 
 	PR go/57045

gcc/testsuite/gcc.c-torture/execute/pr56866.c

+/* PR target/56866 */
+
+int
+main ()
+{
+#if __CHAR_BIT__ == 8 && __SIZEOF_LONG_LONG__ == 8 && __SIZEOF_INT__ == 4 && __SIZEOF_SHORT__ == 2
+  unsigned long long wq[256], rq[256];
+  unsigned int wi[256], ri[256];
+  unsigned short ws[256], rs[256];
+  unsigned char wc[256], rc[256];
+  int t;
+
+  __builtin_memset (wq, 0, sizeof wq);
+  __builtin_memset (wi, 0, sizeof wi);
+  __builtin_memset (ws, 0, sizeof ws);
+  __builtin_memset (wc, 0, sizeof wc);
+  wq[0] = 0x0123456789abcdefULL;
+  wi[0] = 0x01234567;
+  ws[0] = 0x4567;
+  wc[0] = 0x73;
+
+  asm volatile ("" : : "g" (wq), "g" (wi), "g" (ws), "g" (wc) : "memory");
+
+  for (t = 0; t < 256; ++t)
+    rq[t] = (wq[t] >> 8) | (wq[t] << (sizeof (wq[0]) * __CHAR_BIT__ - 8));
+  for (t = 0; t < 256; ++t)
+    ri[t] = (wi[t] >> 8) | (wi[t] << (sizeof (wi[0]) * __CHAR_BIT__ - 8));
+  for (t = 0; t < 256; ++t)
+    rs[t] = (ws[t] >> 9) | (ws[t] << (sizeof (ws[0]) * __CHAR_BIT__ - 9));
+  for (t = 0; t < 256; ++t)
+    rc[t] = (wc[t] >> 5) | (wc[t] << (sizeof (wc[0]) * __CHAR_BIT__ - 5));
+
+  asm volatile ("" : : "g" (rq), "g" (ri), "g" (rs), "g" (rc) : "memory");
+
+  if (rq[0] != 0xef0123456789abcdULL || rq[1])
+    __builtin_abort ();
+  if (ri[0] != 0x67012345 || ri[1])
+    __builtin_abort ();
+  if (rs[0] != 0xb3a2 || rs[1])
+    __builtin_abort ();
+  if (rc[0] != 0x9b || rc[1])
+    __builtin_abort ();
+#endif
+  return 0;
+}

gcc/testsuite/gcc.target/i386/pr56866.c

+/* PR target/56866 */
+/* { dg-do run } */
+/* { dg-require-effective-target xop } */
+/* { dg-options "-O3 -mxop" } */
+
+#define main xop_test_main
+#include "../../gcc.c-torture/execute/pr56866.c"
+#undef main
+
+#include "xop-check.h"
+
+static void
+xop_test (void)
+{
+  xop_test_main ();
+}