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riscv-gcc-1
Commit ba412630 by Kazu Hirata Committed by Kazu Hirata
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h8300-protos.h: Add a prototype for general_operand_dst_push. 

	* config/h8300/h8300-protos.h: Add a prototype for
	general_operand_dst_push.
 	* config/h8300/h8300.c (general_operand_dst_push): New.
	* config/h8300/h8300.h (OK_FOR_T): New.
	(EXTRA_CONSTRAINT): Use it.
	* config/h8300/h8300.md (movqi_push): Remove and integrate into
	the existing movqi pattern.
	(movhi_push): Likewise.

From-SVN: r44283
parent 21715220
Showing with 87 additions and 49 deletions
gcc/ChangeLog
2001-07-23 Kazu Hirata <kazu@hxi.com>
* config/h8300/h8300-protos.h: Add a prototype for
general_operand_dst_push.
* config/h8300/h8300.c (general_operand_dst_push): New.
* config/h8300/h8300.h (OK_FOR_T): New.
(EXTRA_CONSTRAINT): Use it.
* config/h8300/h8300.md (movqi_push): Remove and integrate into
the existing movqi pattern.
(movhi_push): Likewise.
Mon Jul 23 23:34:07 CEST 2001 Jan Hubicka <jh@suse.cz>
* gcse.c (cprop_insn): Update call of cprop_cc0_jump.
......
gcc/config/h8300/h8300-protos.h
......@@ -45,6 +45,7 @@ extern void split_adds_subs PARAMS ((enum machine_mode, rtx[]));
extern int general_operand_src PARAMS ((rtx, enum machine_mode));
extern int general_operand_dst PARAMS ((rtx, enum machine_mode));
extern int general_operand_dst_push PARAMS ((rtx, enum machine_mode mode));
extern int o_operand PARAMS ((rtx, enum machine_mode));
extern int p_operand PARAMS ((rtx, enum machine_mode));
extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
......
gcc/config/h8300/h8300.c
......@@ -537,7 +537,7 @@ general_operand_src (op, mode)
}
/* Return true if OP is a valid destination operand for an integer move
instruction. */
instruction, excluding those involving pre_modify. */
int
general_operand_dst (op, mode)
......@@ -549,6 +549,20 @@ general_operand_dst (op, mode)
return general_operand (op, mode);
}
/* Return true if OP is a valid destination operand for an integer move
instruction, including those involving pre_modify. */
int
general_operand_dst_push (op, mode)
rtx op;
enum machine_mode mode;
{
if (push_operand (op, mode))
return 1;
return general_operand_dst (op, mode);
}
/* Return true if OP is a const valid for a bit clear instruction. */
int
......
gcc/config/h8300/h8300.h
......@@ -840,7 +840,17 @@ struct cum_arg
(GET_CODE (X) == CONST_INT && TARGET_H8300H \
&& 0xffff00 <= INTVAL (X) && INTVAL (X) <= 0xffffff)
/* 'U' if valid for a bset destination;
/* 'T' if valid for a push destination using pre_modify. */
#define OK_FOR_T(OP) \
(GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == PRE_MODIFY \
&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == PLUS \
&& XEXP (XEXP (XEXP (OP, 0), 1), 0) == XEXP (XEXP (OP, 0), 0) \
&& GET_CODE (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == CONST_INT \
&& INTVAL (XEXP (XEXP (XEXP (OP, 0), 1), 1)) == - (int) STACK_BOUNDARY / 8 \
&& XEXP (XEXP (OP, 0), 0) == stack_pointer_rtx)
/* 'U' if valid for a bset destination;
i.e. a register, register indirect, or the eightbit memory region
(a SYMBOL_REF with an SYMBOL_REF_FLAG set).
......@@ -862,7 +872,8 @@ struct cum_arg
&& GET_CODE (XEXP (OP, 0)) == CONST_INT))
#define EXTRA_CONSTRAINT(OP, C) \
((C) == 'U' ? OK_FOR_U (OP) : \
((C) == 'T' ? OK_FOR_T (OP) : \
(C) == 'U' ? OK_FOR_U (OP) : \
0)
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
......
gcc/config/h8300/h8300.md
......@@ -106,40 +106,42 @@
;; movqi
(define_insn "movqi_push"
[(set (match_operand:QI 0 "push_operand" "=<")
(match_operand:QI 1 "register_operand" "r"))]
""
"*
{
if (TARGET_H8300)
return \"push.w %T1\";
else
return \"push.l %S1\";
}"
[(set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
(set_attr "cc" "set_znv")])
(define_insn ""
[(set (match_operand:QI 0 "general_operand_dst_push" "=r,r ,<,T,r,r,m")
(match_operand:QI 1 "general_operand_src" " I,r>,r,r,n,m,r"))]
"TARGET_H8300
&& (register_operand (operands[0],QImode)
|| register_operand (operands[1], QImode))"
"@
sub.b %X0,%X0
mov.b %R1,%X0
mov.b %X1,%R0
mov.w %T1,@-r7
mov.b %R1,%X0
mov.b %R1,%X0
mov.b %X1,%R0"
[(set_attr "length" "2,2,2,2,2,4,4")
(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
(define_insn ""
[(set (match_operand:QI 0 "general_operand_dst" "=r,r,<,r,r,m")
(match_operand:QI 1 "general_operand_src" "I,r>,r,n,m,r"))]
"register_operand (operands[0],QImode)
|| register_operand (operands[1], QImode)"
[(set (match_operand:QI 0 "general_operand_dst_push" "=r,r ,<,r,T,r,m")
(match_operand:QI 1 "general_operand_src" " I,r>,r,n,r,m,r"))]
"(TARGET_H8300H || TARGET_H8300S)
&& (register_operand (operands[0],QImode)
|| register_operand (operands[1], QImode))"
"@
sub.b %X0,%X0
mov.b %R1,%X0
mov.b %X1,%R0
mov.b %R1,%X0
mov.l %S1,@-er7
mov.b %R1,%X0
mov.b %X1,%R0"
[(set_attr_alternative "length"
[(const_int 2) (const_int 2) (const_int 2) (const_int 2)
(if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))
(if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
[(set_attr "length" "2,2,2,2,4,8,8")
(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
(define_expand "movqi"
[(set (match_operand:QI 0 "general_operand_dst" "")
[(set (match_operand:QI 0 "general_operand_dst_push" "")
(match_operand:QI 1 "general_operand_src" ""))]
""
"
......@@ -168,27 +170,12 @@
;; movhi
;; ??? We use push.l on the h8300h to push a 16bit value?!? We have
;; 16bit push insns!
(define_insn "movhi_push"
[(set (match_operand:HI 0 "push_operand" "=<")
(match_operand:HI 1 "register_operand" "r"))]
""
"*
{
if (TARGET_H8300)
return \"push.w %T1\";
else
return \"push.l %S1\";
}"
[(set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
(set_attr "cc" "set_znv")])
(define_insn ""
[(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m")
(match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))]
"register_operand (operands[0],HImode)
|| register_operand (operands[1], HImode)"
"TARGET_H8300
&& (register_operand (operands[0],HImode)
|| register_operand (operands[1], HImode))"
"@
sub.w %T0,%T0
mov.w %T1,%T0
......@@ -196,14 +183,28 @@
mov.w %T1,%T0
mov.w %T1,%T0
mov.w %T1,%T0"
[(set_attr_alternative "length"
[(const_int 2) (const_int 2) (const_int 2) (const_int 4)
(if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))
(if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
[(set_attr "length" "2,2,2,4,4,4")
(set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])
(define_insn ""
[(set (match_operand:HI 0 "general_operand_dst_push" "=r,r,<,T,r,r,m")
(match_operand:HI 1 "general_operand_src" "I,r>,r,r,i,m,r"))]
"(TARGET_H8300H || TARGET_H8300S)
&& (register_operand (operands[0],HImode)
|| register_operand (operands[1], HImode))"
"@
sub.w %T0,%T0
mov.w %T1,%T0
mov.w %T1,%T0
mov.l %S1,@-er7
mov.w %T1,%T0
mov.w %T1,%T0
mov.w %T1,%T0"
[(set_attr "length" "2,2,2,4,4,8,8")
(set_attr "cc" "set_zn,set_znv,set_znv,clobber,set_znv,set_znv,set_znv")])
(define_expand "movhi"
[(set (match_operand:HI 0 "general_operand_dst" "")
[(set (match_operand:HI 0 "general_operand_dst_push" "")
(match_operand:HI 1 "general_operand_src" ""))]
""
"
......
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