re PR testsuite/20772 (x86 tests should run on both i?86 and x86_64)

        PR testsuite/20772
	* gfortran.dg/promotion.f90, gcc.misc-tests/i386-pf-3dnow-1.c,
	gcc.misc-tests/i386-pf-athlon-1.c,
	gcc.misc-tests/i386-pf-none-1.c, gcc.misc-tests/i386-pf-sse-1.c,
	g++.dg/opt/mmx1.C, g++.dg/other/big-struct.C,
	g++.dg/abi/bitfield3.C, g++.dg/abi/bitfield8.C,
	g++.dg/abi/bitfield9.C, g++.dg/abi/empty7.C, g++.dg/abi/empty9.C,
	g++.dg/abi/layout4.C, g++.dg/abi/thunk1.C, g++.dg/abi/thunk2.C,
	g++.dg/abi/vbase11.C, g++.dg/abi/vthunk2.C, g++.dg/abi/vthunk3.C,
	g++.dg/ext/attrib8.C: Run also on x86_64 compiling 32-bit x86
	programs.

	* g++.dg/opt/reg-stack4.C, g++.dg/eh/simd-1.C, g++.dg/eh/simd-1.C,
	gcc.dg/setjmp-2.c, gcc.dg/short-compare-1.c,
	gcc.dg/short-compare-2.c, gcc.target/i386/asm-1.c: Handle 32-bit
	x86-64 compilation.

	* g++.dg/warn/register-var-1.C, g++.dg/charset/asm2.c: Run also on
	x86_64.

	* gcc.dg/i386-pentium4-not-mull.c: Change option handling to use
	effective-target ilp32.

From-SVN: r100220

gcc/testsuite/ChangeLog

+2005-05-26  Andreas Jaeger  <aj@suse.de>
+
+        PR testsuite/20772
+	* gfortran.dg/promotion.f90, gcc.misc-tests/i386-pf-3dnow-1.c,
+	gcc.misc-tests/i386-pf-athlon-1.c,
+	gcc.misc-tests/i386-pf-none-1.c, gcc.misc-tests/i386-pf-sse-1.c,
+	g++.dg/opt/mmx1.C, g++.dg/other/big-struct.C,
+	g++.dg/abi/bitfield3.C, g++.dg/abi/bitfield8.C,
+	g++.dg/abi/bitfield9.C, g++.dg/abi/empty7.C, g++.dg/abi/empty9.C,
+	g++.dg/abi/layout4.C, g++.dg/abi/thunk1.C, g++.dg/abi/thunk2.C,
+	g++.dg/abi/vbase11.C, g++.dg/abi/vthunk2.C, g++.dg/abi/vthunk3.C,
+	g++.dg/ext/attrib8.C: Run also on x86_64 compiling 32-bit x86
+	programs.
+
+	* g++.dg/opt/reg-stack4.C, g++.dg/eh/simd-1.C, g++.dg/eh/simd-1.C,
+	gcc.dg/setjmp-2.c, gcc.dg/short-compare-1.c,
+	gcc.dg/short-compare-2.c, gcc.target/i386/asm-1.c: Handle 32-bit
+	x86-64 compilation.
+
+	* g++.dg/warn/register-var-1.C, g++.dg/charset/asm2.c: Run also on
+	x86_64.
+
+	* gcc.dg/i386-pentium4-not-mull.c: Change option handling to use
+	effective-target ilp32.
+
 2005-05-26  David Ung  <davidu@mips.com>
 
 	* gcc.target/mips/ext_ins.c: New test for testing the generation
 	of MIPS32/64 rev 2 ext/ins instructions.
-	
+
 2005-05-26  Andreas Jaeger  <aj@suse.de>
 
 	* treelang/compile/unsigned.tree: Use gimple instead of

gcc/testsuite/g++.dg/abi/bitfield3.C

 // Test for oversized bitfield alignment in structs on IA-32
-// { dg-do run { target i?86-*-* } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
 // { dg-options "-O2" }
 // Cygwin and mingw32 default to MASK_ALIGN_DOUBLE. Override to ensure
 // 4-byte alignment.
 // { dg-options "-mno-align-double" { target i?86-*-cygwin* i?86-*-mingw* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-require-effective-target ilp32 }
 
 struct A
 {

gcc/testsuite/g++.dg/abi/bitfield8.C

-// { dg-do run { target i?86-*-* } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
 // { dg-options "-fabi-version=0" }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-require-effective-target ilp32 }
+
 
 struct A { 
   virtual void f() {}

gcc/testsuite/g++.dg/abi/bitfield9.C

-// { dg-do run { target i?86-*-* } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options -w }
 
 struct X {

gcc/testsuite/g++.dg/abi/empty7.C

-// { dg-do run { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options "-fabi-version=0" }
 
 struct S1 {};

gcc/testsuite/g++.dg/abi/empty9.C

-// { dg-do run { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options "-w -fabi-version=0" }
 
 struct E1 {};

gcc/testsuite/g++.dg/abi/layout4.C

-// { dg-do run { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options "-fabi-version=1" }
 
 struct C4

gcc/testsuite/g++.dg/abi/thunk1.C

-// { dg-do compile { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
+
 
 struct A {
   virtual void f ();

gcc/testsuite/g++.dg/abi/thunk2.C

-// { dg-do compile { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options -w }
 
 struct A {

gcc/testsuite/g++.dg/abi/vbase11.C

-// { dg-do run { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options "-fabi-version=0" }
 
 struct A { virtual void f(); char c1; };

gcc/testsuite/g++.dg/abi/vthunk2.C

-// { dg-do compile { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do compile { target i?86-*-* x86_64-*-*} }
+// { dg-require-effective-target ilp32 }
 
 struct c0 {
   virtual void f ();

gcc/testsuite/g++.dg/abi/vthunk3.C

-// { dg-do compile { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 // { dg-options "-fabi-version=0" }
 
 struct A {

gcc/testsuite/g++.dg/charset/asm2.c

 /* Test for complex asm statements. Make sure it compiles
    then test for some of the asm statements not being translated.  */
-/* { dg-do compile { target i?86-*-* } }
+/* { dg-do compile { target i?86-*-* x86_64-*-* } }
    { dg-require-iconv "IBM1047" }
    { dg-final { scan-assembler "std" } }
    { dg-final { scan-assembler "cld" } }

gcc/testsuite/g++.dg/eh/simd-1.C

@@ -2,6 +2,7 @@
 // Contributed by Aldy Hernandez (aldy@quesejoda.com).
 // { dg-options "-O" }
 // { dg-options "-O -w" { target i?86-*-* } }
+// { dg-options "-O -w" { target { x86_64-*-* && ilp32 } } }
 // { dg-do run }
 
 typedef int __attribute__((vector_size (8))) vecint;

gcc/testsuite/g++.dg/ext/attrib8.C

 // PR 8656
-// { dg-do compile { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 
 extern int * (__attribute__((stdcall)) *fooPtr)( void);
 int * __attribute__((stdcall)) myFn01( void) { return 0; }

gcc/testsuite/g++.dg/opt/mmx1.C

@@ -3,7 +3,8 @@
 // mmx -> mmx register moves.
 // { dg-do compile }
 // { dg-options "-O2" }
-// { dg-options "-fno-exceptions -O2 -mmmx -fPIC" { target i?86-*-*  } }
+// { dg-options "-fno-exceptions -O2 -mmmx -fPIC" { target { i?86-*-*  && ilp32 }  } }
+// { dg-options "-fno-exceptions -O2 -mmmx -fPIC" { target { x86_64-*-* && ilp32 } } }
 
 struct A {
   unsigned a0;

gcc/testsuite/g++.dg/opt/reg-stack4.C

@@ -5,8 +5,8 @@
 // deleted a valid edge.
 
 // { dg-do compile }
-// { dg-options "-mtune=i586 -O2" { target i?86-*-* } }
-// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } }
+// { dg-options "-mtune=i586 -O2" { target { i?86-*-* && ilp32 } } }
+// { dg-options "-mtune=i586 -O2" { target { x86_64-*-* && ilp32 } } }
 
 struct array {
   double data;

gcc/testsuite/g++.dg/other/big-struct.C

-// { dg-do compile { target i?86-*-* } }
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
 
 struct A
 {

gcc/testsuite/g++.dg/warn/register-var-1.C

 /* PR/18160 */
 
-/* { dg-do compile { target i?86-*-* } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
 
 /* This should yield an error even without -pedantic.  */
 /* { dg-options "-ansi" } */

gcc/testsuite/gcc.dg/i386-pentium4-not-mull.c

 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=pentium4" { target i?86-*-* } } */
-/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */
-/* { dg-options "-O2 -march=pentium4 -m32" { target x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=pentium4" } */
 /* { dg-final { scan-assembler-not "imull" } } */
 
 /* Should be done not using imull.  */

gcc/testsuite/gcc.dg/setjmp-2.c

 /* PR middle-end/17813 */
 /* Origin: Tom Hughes <tom@compton.nu> */
 /* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */
-/* { dg-options "-O -fomit-frame-pointer -march=i386" { target i?86-*-linux* } } */
-/* { dg-options "-O -fomit-frame-pointer -m32 -march=i386" { target x86_64-*-linux* } } */
+/* { dg-options "-O -fomit-frame-pointer -march=i386" { target { i?86-*-linux* && ilp32 } } } */
+/* { dg-options "-O -fomit-frame-pointer -march=i386" { target { x86_64-*-linux* && ilp32 } } } */
 
 #include <setjmp.h>
 #include <signal.h>

gcc/testsuite/gcc.dg/short-compare-1.c

@@ -4,7 +4,7 @@
 /* { dg-do run } */
 /* { dg-options "-O" } */
 /* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
-/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
+/* { dg-options "-O -mtune=i686" { target { x86_64-*-* && ilp32 } } } */
 
 extern void abort(void);
 

gcc/testsuite/gcc.dg/short-compare-2.c

@@ -5,7 +5,7 @@
 /* { dg-do run } */
 /* { dg-options "-O" } */
 /* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
-/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
+/* { dg-options "-O -mtune=i686" { target { x86_64-*-* && ilp32 } } } */
 
 extern void abort();
 

gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c

 /* Test that the correct data prefetch instructions are generated for i386
    variants that use 3DNow! prefetch instructions.  */
 
-/* { dg-do compile { target i?86-*-* } } */
-/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-*} } */
+/* { dg-require-effective-target ilp32 } */
 
 extern void exit (int);
 

gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c

@@ -2,8 +2,8 @@
    variants that use 3DNow! prefetchw or SSE prefetch instructions with
    locality hints.  */
 
-/* { dg-do compile { target i?86-*-* } } */
-/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 
 extern void exit (int);
 

gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c

 /* Test that data prefetch instructions are not generated for i386 variants
    that do not support those instructions.  */
 
-/* { dg-do compile { target i?86-*-* } } */
-/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 
 extern void exit (int);
 

gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c

 /* Test that the correct data prefetch instructions are generated for i386
    variants that use SSE prefetch instructions.  */
 
-/* { dg-do compile { target i?86-*-* } } */
-/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 
 extern void exit (int);
 

gcc/testsuite/gfortran.dg/promotion.f90

-! { dg-do run { target i?86-*-* } }
+! { dg-do run { target i?86-*-* x86_64-*-* } }
+! { dg-require-effective-target ilp32 }
 ! { dg-options "-fdefault-integer-8 -fdefault-real-8" }
 program a
    logical l