Commit b8a64b7f by Claudiu Zissulescu Committed by Claudiu Zissulescu

[ARC] Add support for atomic memory built-in.

gcc/

2015-12-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-protos.h (arc_expand_atomic_op): Prototype.
	(arc_split_compare_and_swap): Likewise.
	(arc_expand_compare_and_swap): Likewise.
	* config/arc/arc.c (arc_init): Check usage atomic option.
	(arc_pre_atomic_barrier): New function.
	(arc_post_atomic_barrier): Likewise.
	(emit_unlikely_jump): Likewise.
	(arc_expand_compare_and_swap_qh): Likewise.
	(arc_expand_compare_and_swap): Likewise.
	(arc_split_compare_and_swap): Likewise.
	(arc_expand_atomic_op): Likewise.
	* config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): New C macro.
	(ASM_SPEC): Enable mlock option when matomic is used.
	* config/arc/arc.md (UNSPEC_ARC_MEMBAR): Define.
	(VUNSPEC_ARC_CAS): Likewise.
	(VUNSPEC_ARC_LL): Likewise.
	(VUNSPEC_ARC_SC): Likewise.
	(VUNSPEC_ARC_EX): Likewise.
	* config/arc/arc.opt (matomic): New option.
	* config/arc/constraints.md (ATO): New constraint.
	* config/arc/predicates.md (mem_noofs_operand): New predicate.
	* doc/invoke.texi: Document -matomic.
	* config/arc/atomic.md: New file.

gcc/testsuite

2015-12-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* lib/target-supports.exp (check_effective_target_arc_atomic): New
	function.
	(check_effective_target_sync_int_long): Add checks for ARC atomic
	feature.
	(check_effective_target_sync_char_short): Likewise.

From-SVN: r231509
parent 41eefe13
2015-12-10 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_expand_atomic_op): Prototype.
(arc_split_compare_and_swap): Likewise.
(arc_expand_compare_and_swap): Likewise.
* config/arc/arc.c (arc_init): Check usage atomic option.
(arc_pre_atomic_barrier): New function.
(arc_post_atomic_barrier): Likewise.
(emit_unlikely_jump): Likewise.
(arc_expand_compare_and_swap_qh): Likewise.
(arc_expand_compare_and_swap): Likewise.
(arc_split_compare_and_swap): Likewise.
(arc_expand_atomic_op): Likewise.
* config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): New C macro.
(ASM_SPEC): Enable mlock option when matomic is used.
* config/arc/arc.md (UNSPEC_ARC_MEMBAR): Define.
(VUNSPEC_ARC_CAS): Likewise.
(VUNSPEC_ARC_LL): Likewise.
(VUNSPEC_ARC_SC): Likewise.
(VUNSPEC_ARC_EX): Likewise.
* config/arc/arc.opt (matomic): New option.
* config/arc/constraints.md (ATO): New constraint.
* config/arc/predicates.md (mem_noofs_operand): New predicate.
* doc/invoke.texi: Document -matomic.
* config/arc/atomic.md: New file.
2015-12-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/68817
......@@ -41,6 +41,10 @@ extern int arc_output_commutative_cond_exec (rtx *operands, bool);
extern bool arc_expand_movmem (rtx *operands);
extern bool prepare_move_operands (rtx *operands, machine_mode mode);
extern void emit_shift (enum rtx_code, rtx, rtx, rtx);
extern void arc_expand_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
extern void arc_split_compare_and_swap (rtx *);
extern void arc_expand_compare_and_swap (rtx *);
#endif /* RTX_CODE */
#ifdef TREE_CODE
......
......@@ -88,6 +88,10 @@ along with GCC; see the file COPYING3. If not see
{ \
builtin_define ("__HS__"); \
} \
if (TARGET_ATOMIC) \
{ \
builtin_define ("__ARC_ATOMIC__"); \
} \
if (TARGET_NORM) \
{ \
builtin_define ("__ARC_NORM__");\
......@@ -153,7 +157,7 @@ along with GCC; see the file COPYING3. If not see
%{mcpu=ARC700|!mcpu=*:%{mrtsc}} \
%{mcpu=ARCHS:-mHS} \
%{mcpu=ARCEM:-mEM} \
"
%{matomic:-mlock}"
#if DEFAULT_LIBC == LIBC_UCLIBC
/* Note that the default is to link against dynamic libraries, if they are
......
......@@ -128,6 +128,12 @@
(VUNSPEC_UNIMP_S 28) ; blockage insn for unimp_s generation
(VUNSPEC_NOP 29) ; volatile NOP
(UNSPEC_ARC_MEMBAR 30)
(VUNSPEC_ARC_CAS 31)
(VUNSPEC_ARC_LL 32)
(VUNSPEC_ARC_SC 33)
(VUNSPEC_ARC_EX 34)
(R0_REG 0)
(R1_REG 1)
(R2_REG 2)
......@@ -5531,3 +5537,6 @@
(include "fpx.md")
(include "simdext.md")
;; include atomic extensions
(include "atomic.md")
......@@ -414,3 +414,6 @@ Target Joined
mmac_
Target Joined
matomic
Target Report Mask(ATOMIC)
Enable atomic instructions.
......@@ -421,3 +421,9 @@
An unsigned 6-bit integer constant, up to 62."
(and (match_code "const_int")
(match_test "UNSIGNED_INT6 (ival - 1)")))
;; Memory constraint used for atomic ops.
(define_memory_constraint "ATO"
"A memory with only a base register"
(match_operand 0 "mem_noofs_operand"))
......@@ -813,3 +813,7 @@
(define_predicate "short_const_int_operand"
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_C16 (op)")))
(define_predicate "mem_noofs_operand"
(and (match_code "mem")
(match_code "reg" "0")))
......@@ -538,7 +538,7 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mbarrel-shifter @gol
-mcpu=@var{cpu} -mA6 -mARC600 -mA7 -mARC700 @gol
-mdpfp -mdpfp-compact -mdpfp-fast -mno-dpfp-lrsr @gol
-mea -mno-mpy -mmul32x16 -mmul64 @gol
-mea -mno-mpy -mmul32x16 -mmul64 -matomic @gol
-mnorm -mspfp -mspfp-compact -mspfp-fast -msimd -msoft-float -mswap @gol
-mcrc -mdsp-packa -mdvbf -mlock -mmac-d16 -mmac-24 -mrtsc -mswape @gol
-mtelephony -mxy -misize -mannotate-align -marclinux -marclinux_prof @gol
......@@ -12970,6 +12970,12 @@ can overridden by FPX options; @samp{mspfp}, @samp{mspfp-compact}, or
@opindex mswap
Generate swap instructions.
@item -matomic
@opindex matomic
This enables Locked Load/Store Conditional extension to implement
atomic memopry built-in functions. Not available for ARC 6xx or ARC
EM cores.
@item -mdiv-rem
@opindex mdiv-rem
Enable DIV/REM instructions for ARCv2 cores.
......
2015-12-10 Claudiu Zissulescu <claziss@synopsys.com>
* lib/target-supports.exp (check_effective_target_arc_atomic): New
function.
(check_effective_target_sync_int_long): Add checks for ARC atomic
feature.
(check_effective_target_sync_char_short): Likewise.
2015-12-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/68817
......
......@@ -2608,6 +2608,15 @@ proc check_effective_target_aarch64_little_endian { } {
}]
}
# Return 1 if this is a compiler supporting ARC atomic operations
proc check_effective_target_arc_atomic { } {
return [check_no_compiler_messages arc_atomic assembly {
#if !defined(__ARC_ATOMIC__)
#error FOO
#endif
}]
}
# Return 1 if this is an arm target using 32-bit instructions
proc check_effective_target_arm32 { } {
if { ![istarget arm*-*-*] } {
......@@ -5581,6 +5590,7 @@ proc check_effective_target_sync_int_long { } {
|| [istarget crisv32-*-*] || [istarget cris-*-*]
|| ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
|| [istarget spu-*-*]
|| ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
|| [check_effective_target_mips_llsc] } {
set et_sync_int_long_saved 1
}
......@@ -5612,6 +5622,7 @@ proc check_effective_target_sync_char_short { } {
|| [istarget crisv32-*-*] || [istarget cris-*-*]
|| ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
|| [istarget spu-*-*]
|| ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
|| [check_effective_target_mips_llsc] } {
set et_sync_char_short_saved 1
}
......
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