re PR target/82848 (ICE in expand_expr_real_2, at expr.c:8715)

	PR target/82848
	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Don't fold
	builtins not enabled in the currently selected ISA.

	* gcc.target/powerpc/pr82848.c: New test.

From-SVN: r255148

gcc/ChangeLog

+2017-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/82848
+	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Don't fold
+	builtins not enabled in the currently selected ISA.
+
 2017-11-24  Jackson Woodruff  <jackson.woodruff@arm.com>
 
 	PR tree-optimization/71026

gcc/config/rs6000/rs6000.c

@@ -16143,6 +16143,12 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
   if (!gimple_call_lhs (stmt) && !rs6000_builtin_valid_without_lhs (fn_code))
     return false;
 
+  /* Don't fold invalid builtins, let rs6000_expand_builtin diagnose it.  */
+  HOST_WIDE_INT mask = rs6000_builtin_info[uns_fncode].mask;
+  bool func_valid_p = (rs6000_builtin_mask & mask) == mask;
+  if (!func_valid_p)
+    return false;
+
   switch (fn_code)
     {
     /* Flavors of vec_add.  We deliberately don't expand

gcc/testsuite/ChangeLog

+2017-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/82848
+	* gcc.target/powerpc/pr82848.c: New test.
+
 2017-11-24  Jackson Woodruff  <jackson.woodruff@arm.com>
 
 	PR tree-optimization/71026

gcc/testsuite/gcc.target/powerpc/pr82848.c

+/* PR target/82848 */
+/* { dg-do compile } */
+/* { dg-options "-mno-altivec -mno-vsx -Wno-psabi" } */
+
+#define C 3.68249351546114573519399405666776E-44f
+#define vector __attribute__ ((altivec (vector__)))
+
+vector float
+foo (vector float a)
+{
+  vector float b = __builtin_vec_madd (b, a, (vector float) { C, C, C, C });	/* { dg-error "requires the '-maltivec' option" } */
+  return b;
+}