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riscv-gcc-1
Commit b6d33983 by J"orn Rennecke Committed by Joern Rennecke
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sh.h (PREDICATE_CODES): Add general_extend_operand and inqhi_operand. 

	* sh.h (PREDICATE_CODES): Add general_extend_operand and inqhi_operand.
	* sh.c (general_extend_operand, inqhi_operand): New functions.
	* sh.md (cmpeqdi_media, cmpgtdi_media, cmpgtudi_media): Collapse
	alternatives using 'N' modifier.  Add type.
	(adddi3z_media): Likewise.  Enable generator function generation.
	(movdicc_false, movdicc_true, addsi3_media, subsi3_media): Use more
	exact predicates / constraints.  Add type.
	(subsi3): Allow 0 for SHMEDIA.
	(udivsi3_i4_media): Use match_operand for input values
	rather than hard registers.
	(udivsi3 - TARGET_SHMEDIA_FPU case): Don't ferry values
	unnecessarily through hard registers.  Keep copies of pseudo
	registers outside of the libcall sequence.
	(mulsidi3_media, umulsidi3_media): Use more exact predicates.  Add type.
	(ashlsi3_media, ashrsi3_media, lshrsi3_media): Likewise.
	(zero_extendsidi2, zero_extendhidi2, zero_extendqidi2): Likewise.
	(extendhidi2, extendqidi2): Likewise.
	(andsi3_compact): Name.
	(andcdi3): Enable generator function generation.
	(zero_extendhisi2, zero_extendqisi2): Rename to
	(zero_extendhisi2_compact, zero_extendqisi2_compact).
	(extendhisi2, extendqisi2): Rename to
	(extendhisi2_compact, extendqisi2_compact).
	(rotldi3, rotldi3_mextr, rotrdi3, rotrdi3_mextr): New patterns.
	(loaddi_trunc, zero_extendhisi2, zero_extendhisi2_media): Likewise.
	(zero_extendhisi2_media+1, zero_extendqisi2): Likewise.
	(zero_extendqisi2_media, extendhisi2, extendhisi2_media): Likewise.
	(extendhisi2_media, extendhisi2_media+1, extendqisi2): Likewise.
	(extendqisi2_media, extendqisi2_media+1, truncdisi2): Likewise.
	(truncdihi2, truncdiqi2, reload_inqi, reload_inhi): Likewise.
	(shmedia32_initialize_trampoline_big): Likewise.
	(shmedia32_initialize_trampoline_little): Likewise.
	(nsb, nsbsi, nsbdi, ffsdi2, ffssi2, byterev): Likewise.
	(negdi2): Remove spurious T clobber.
	(zero_extendhidi2+1, extendhidi2+1, extendqidi2+1): Handle TRUNCATE.
	(movsi_media, movsi_media_nofpu): Remove spurious *k after b.
	(movdi_media, movdi_media_nofpu, pt, ptb): Likewise.
	(movsi_media_nofpu+2, movhi_media+1): Only do split after reload.
	(ic_invalidate_line_media): Write back data cache before invalidating
	instruction cache.  Add type.
	(movsf_media): Sign-extend when the destination is a general
	purpose register.  Add type.
	(bgt_media, bge_media, bgtu_media, bgeu_media, blt_media_i): Allow 0.
	(casesi_worker_0+1): Only increment ref count for proper label.
	(casesi_worker_0+2): Likewise.

From-SVN: r55345
parent 2c701c01
Showing with 73 additions and 0 deletions
gcc/ChangeLog
Tue Jul 9 21:39:50 2002 J"orn Rennecke <joern.rennecke@superh.com>
* sh.h (PREDICATE_CODES): Add general_extend_operand and inqhi_operand.
* sh.c (general_extend_operand, inqhi_operand): New functions.
* sh.md (cmpeqdi_media, cmpgtdi_media, cmpgtudi_media): Collapse
alternatives using 'N' modifier. Add type.
(adddi3z_media): Likewise. Enable generator function generation.
(movdicc_false, movdicc_true, addsi3_media, subsi3_media): Use more
exact predicates / constraints. Add type.
(subsi3): Allow 0 for SHMEDIA.
(udivsi3_i4_media): Use match_operand for input values
rather than hard registers.
(udivsi3 - TARGET_SHMEDIA_FPU case): Don't ferry values
unnecessarily through hard registers. Keep copies of pseudo
registers outside of the libcall sequence.
(mulsidi3_media, umulsidi3_media): Use more exact predicates. Add type.
(ashlsi3_media, ashrsi3_media, lshrsi3_media): Likewise.
(zero_extendsidi2, zero_extendhidi2, zero_extendqidi2): Likewise.
(extendhidi2, extendqidi2): Likewise.
(andsi3_compact): Name.
(andcdi3): Enable generator function generation.
(zero_extendhisi2, zero_extendqisi2): Rename to
(zero_extendhisi2_compact, zero_extendqisi2_compact).
(extendhisi2, extendqisi2): Rename to
(extendhisi2_compact, extendqisi2_compact).
(rotldi3, rotldi3_mextr, rotrdi3, rotrdi3_mextr): New patterns.
(loaddi_trunc, zero_extendhisi2, zero_extendhisi2_media): Likewise.
(zero_extendhisi2_media+1, zero_extendqisi2): Likewise.
(zero_extendqisi2_media, extendhisi2, extendhisi2_media): Likewise.
(extendhisi2_media, extendhisi2_media+1, extendqisi2): Likewise.
(extendqisi2_media, extendqisi2_media+1, truncdisi2): Likewise.
(truncdihi2, truncdiqi2, reload_inqi, reload_inhi): Likewise.
(shmedia32_initialize_trampoline_big): Likewise.
(shmedia32_initialize_trampoline_little): Likewise.
(nsb, nsbsi, nsbdi, ffsdi2, ffssi2, byterev): Likewise.
(negdi2): Remove spurious T clobber.
(zero_extendhidi2+1, extendhidi2+1, extendqidi2+1): Handle TRUNCATE.
(movsi_media, movsi_media_nofpu): Remove spurious *k after b.
(movdi_media, movdi_media_nofpu, pt, ptb): Likewise.
(movsi_media_nofpu+2, movhi_media+1): Only do split after reload.
(ic_invalidate_line_media): Write back data cache before invalidating
instruction cache. Add type.
(movsf_media): Sign-extend when the destination is a general
purpose register. Add type.
(bgt_media, bge_media, bgtu_media, bgeu_media, blt_media_i): Allow 0.
(casesi_worker_0+1): Only increment ref count for proper label.
(casesi_worker_0+2): Likewise.
2002-07-09 Mark Mitchell <mark@codesourcery.com>
* dwarfout.c (dwarfout_init): Warn that DWARF1 is deprecated.
......
gcc/config/sh/sh.c
......@@ -6275,6 +6275,29 @@ extend_reg_or_0_operand (op, mode)
: arith_reg_or_0_operand) (op, mode);
}
int
general_extend_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (GET_CODE (op) == TRUNCATE
? arith_operand
: nonimmediate_operand) (op, mode);
}
int
inqhi_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) != TRUNCATE || mode != GET_MODE (op))
return 0;
op = XEXP (op, 0);
/* Can't use true_regnum here because copy_cost wants to know about
SECONDARY_INPUT_RELOAD_CLASS. */
return GET_CODE (op) == REG && FP_REGISTER_P (REGNO (op));
}
/* Return nonzero if V is a zero vector matching MODE. */
int
zero_vec_operand (v, mode)
......
gcc/config/sh/sh.h
......@@ -3240,9 +3240,11 @@ extern int rtx_equal_function_value_matters;
{"fp_arith_reg_operand", {SUBREG, REG}}, \
{"fpscr_operand", {REG}}, \
{"fpul_operand", {REG}}, \
{"general_extend_operand", {SUBREG, REG, MEM, TRUNCATE}}, \
{"general_movsrc_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, MEM}}, \
{"general_movdst_operand", {SUBREG, REG, MEM}}, \
{"greater_comparison_operator", {GT,GE,GTU,GEU}}, \
{"inqhi_operand", {TRUNCATE}}, \
{"less_comparison_operator", {LT,LE,LTU,LEU}}, \
{"logical_operand", {SUBREG, REG, CONST_INT}}, \
{"mextr_bit_offset", {CONST_INT}}, \
......
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