Commit b6d2f42e by Richard Sandiford Committed by Richard Sandiford

m68k.md (adddi_dilshr32): Rename to...

gcc/
	* config/m68k/m68k.md (adddi_dilshr32): Rename to...
	(*adddi_dilshr32): ...this.  Fix formatting.  Remove commented-out
	non-canonical pattern.  Restrict to !TARGET_COLDFIRE.
	(*adddi_dilshr32_cf): New pattern.
	(adddi3, subdi3): Remove first alternatives.

From-SVN: r120963
parent f6ab62e8
2007-01-19 Richard Sandiford <richard@codesourcery.com> 2007-01-19 Richard Sandiford <richard@codesourcery.com>
* config/m68k/m68k.md (adddi_dilshr32): Rename to...
(*adddi_dilshr32): ...this. Fix formatting. Remove commented-out
non-canonical pattern. Restrict to !TARGET_COLDFIRE.
(*adddi_dilshr32_cf): New pattern.
(adddi3, subdi3): Remove first alternatives.
2007-01-19 Richard Sandiford <richard@codesourcery.com>
* config/m68k/m68k.c (notice_update_cc): If an SFmode move is * config/m68k/m68k.c (notice_update_cc): If an SFmode move is
implemented using move.l, do not use its cc result for floating-point implemented using move.l, do not use its cc result for floating-point
comparisons. comparisons.
......
...@@ -1907,15 +1907,12 @@ ...@@ -1907,15 +1907,12 @@
return "move%.w %1,%3\;ext%.l %3\;add%.l %3,%0"; return "move%.w %1,%3\;ext%.l %3\;add%.l %3,%0";
}) })
(define_insn "adddi_dilshr32" (define_insn "*adddi_dilshr32"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,o") [(set (match_operand:DI 0 "nonimmediate_operand" "=d,o")
;; (plus:DI (match_operand:DI 2 "general_operand" "%0") (plus:DI (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro,d")
;; (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro") (const_int 32))
;; (const_int 32))))] (match_operand:DI 2 "general_operand" "0,0")))]
(plus:DI (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro,d") "!TARGET_COLDFIRE"
(const_int 32))
(match_operand:DI 2 "general_operand" "0,0")))]
""
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
if (GET_CODE (operands[0]) == REG) if (GET_CODE (operands[0]) == REG)
...@@ -1925,6 +1922,17 @@ ...@@ -1925,6 +1922,17 @@
return "add%.l %1,%2\;negx%.l %0\;neg%.l %0"; return "add%.l %1,%2\;negx%.l %0\;neg%.l %0";
}) })
(define_insn "*adddi_dilshr32_cf"
[(set (match_operand:DI 0 "register_operand" "=d")
(plus:DI (lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "ro")
(const_int 32))
(match_operand:DI 2 "register_operand" "0")))]
"TARGET_COLDFIRE"
{
CC_STATUS_INIT;
return "add%.l %1,%R0\;negx%.l %0\;neg%.l %0";
})
(define_insn "adddi_dishl32" (define_insn "adddi_dishl32"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o") [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o")
;; (plus:DI (match_operand:DI 2 "general_operand" "%0") ;; (plus:DI (match_operand:DI 2 "general_operand" "%0")
...@@ -1944,10 +1952,10 @@ ...@@ -1944,10 +1952,10 @@
}) })
(define_insn "adddi3" (define_insn "adddi3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=<,o<>,d,d,d") [(set (match_operand:DI 0 "nonimmediate_operand" "=o<>,d,d,d")
(plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,0,0") (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,0")
(match_operand:DI 2 "general_operand" "<,d,no>,d,a"))) (match_operand:DI 2 "general_operand" "d,no>,d,a")))
(clobber (match_scratch:SI 3 "=X,&d,&d,X,&d"))] (clobber (match_scratch:SI 3 "=&d,&d,X,&d"))]
"" ""
{ {
if (DATA_REG_P (operands[0])) if (DATA_REG_P (operands[0]))
...@@ -2000,9 +2008,6 @@ ...@@ -2000,9 +2008,6 @@
else else
{ {
gcc_assert (GET_CODE (operands[0]) == MEM); gcc_assert (GET_CODE (operands[0]) == MEM);
if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "add%.l %2,%0\;addx%.l %2,%0";
CC_STATUS_INIT; CC_STATUS_INIT;
if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
{ {
...@@ -2389,10 +2394,10 @@ ...@@ -2389,10 +2394,10 @@
}) })
(define_insn "subdi3" (define_insn "subdi3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=<,o<>,d,d,d") [(set (match_operand:DI 0 "nonimmediate_operand" "=o<>,d,d,d")
(minus:DI (match_operand:DI 1 "general_operand" "0,0,0,0,0") (minus:DI (match_operand:DI 1 "general_operand" "0,0,0,0")
(match_operand:DI 2 "general_operand" "<,d,no>,d,a"))) (match_operand:DI 2 "general_operand" "d,no>,d,a")))
(clobber (match_scratch:SI 3 "=X,&d,&d,X,&d"))] (clobber (match_scratch:SI 3 "=&d,&d,X,&d"))]
"" ""
{ {
if (DATA_REG_P (operands[0])) if (DATA_REG_P (operands[0]))
...@@ -2447,9 +2452,6 @@ ...@@ -2447,9 +2452,6 @@
else else
{ {
gcc_assert (GET_CODE (operands[0]) == MEM); gcc_assert (GET_CODE (operands[0]) == MEM);
if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "sub%.l %2,%0\;subx%.l %2,%0";
CC_STATUS_INIT; CC_STATUS_INIT;
if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
{ {
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment