Commit b6d2248c by Geoffrey Keating Committed by Geoffrey Keating

predicates.md (indexed_or_indirect_operand): New.

	* config/rs6000/predicates.md (indexed_or_indirect_operand): New.
	(word_offset_memref_operand): New.
	* config/rs6000/rs6000-protos.h (word_offset_memref_operand): Delete.
	(indexed_or_indirect_operand): Delete.
	* config/rs6000/rs6000.c (word_offset_memref_operand): Delete.
	(indexed_or_indirect_operand): Delete.

From-SVN: r97437
parent 807ecedf
2005-04-02 Geoffrey Keating <geoffk@apple.com>
* config/rs6000/predicates.md (indexed_or_indirect_operand): New.
(word_offset_memref_operand): New.
* config/rs6000/rs6000-protos.h (word_offset_memref_operand): Delete.
(indexed_or_indirect_operand): Delete.
* config/rs6000/rs6000.c (word_offset_memref_operand): Delete.
(indexed_or_indirect_operand): Delete.
* config/rs6000/t-darwin8: Comment out ppc64 multilib.
PR 20650
......
......@@ -358,6 +358,22 @@
|| reload_in_progress,
mode, XEXP (op, 0))")))
;; Return 1 if the operand is an indexed or indirect memory operand.
(define_predicate "indexed_or_indirect_operand"
(and (match_operand 0 "memory_operand")
(match_test "REG_P (XEXP (op, 0))
|| (GET_CODE (XEXP (op, 0)) == PLUS
&& REG_P (XEXP (XEXP (op, 0), 0))
&& REG_P (XEXP (XEXP (op, 0), 1)))")))
;; Return 1 if the operand is a memory operand with an address divisible by 4
(define_predicate "word_offset_memref_operand"
(and (match_operand 0 "memory_operand")
(match_test "GET_CODE (XEXP (op, 0)) != PLUS
|| ! REG_P (XEXP (XEXP (op, 0), 0))
|| GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT
|| INTVAL (XEXP (XEXP (op, 0), 1)) % 4 == 0")))
;; Return 1 if the operand is either a non-special register or can be used
;; as the operand of a `mode' add insn.
(define_predicate "add_operand"
......
......@@ -48,8 +48,6 @@ extern bool rs6000_legitimate_offset_address_p (enum machine_mode, rtx, int);
extern rtx rs6000_got_register (rtx);
extern rtx find_addr_reg (rtx);
extern int word_offset_memref_operand (rtx, enum machine_mode);
extern int indexed_or_indirect_operand (rtx, enum machine_mode);
extern rtx gen_easy_vector_constant_add_self (rtx);
extern const char *output_vec_const_move (rtx *);
extern void build_mask64_2_operands (rtx, rtx *);
......
......@@ -2276,46 +2276,6 @@ small_data_operand (rtx op ATTRIBUTE_UNUSED,
#endif
}
/* Return true, if operand is a memory operand and has a
displacement divisible by 4. */
int
word_offset_memref_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
rtx addr;
int off = 0;
if (!memory_operand (op, mode))
return 0;
addr = XEXP (op, 0);
if (GET_CODE (addr) == PLUS
&& GET_CODE (XEXP (addr, 0)) == REG
&& GET_CODE (XEXP (addr, 1)) == CONST_INT)
off = INTVAL (XEXP (addr, 1));
return (off % 4) == 0;
}
/* Return true if the operand is an indirect or indexed memory operand. */
int
indexed_or_indirect_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
rtx addr;
if (!memory_operand (op, mode))
return 0;
addr = XEXP (op, 0);
if (GET_CODE (addr) == REG)
return 1;
if (GET_CODE (addr) == PLUS
&& GET_CODE (XEXP (addr, 0)) == REG
&& GET_CODE (XEXP (addr, 1)) == REG)
return 1;
return 0;
}
/* Return true if either operand is a general purpose register. */
bool
......
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