ia64.h (no-inline-float-divide): New option.

	* config/ia64/ia64.h (no-inline-float-divide): New option.
	* config/ia64/ia64.h (no-inline-int-divide): New option.
	* config/ia64/ia64.h (no-inline-sqrt): New option.
	(TARGET_DEFAULT): Add MASK_INLINE_FLOAT_DIV_THR to define.
	* config/ia64/hpux.h (TARGET_DEFAULT): Ditto.
	* config/ia64/ia64.c (ia64_override_options): Modify error
	checking for inlined division/sqrt.

From-SVN: r78569

gcc/ChangeLog

+2004-02-27  Steve Ellcey  <sje@cup.hp.com>
+
+	* config/ia64/ia64.h (no-inline-float-divide): New option.
+	* config/ia64/ia64.h (no-inline-int-divide): New option.
+	* config/ia64/ia64.h (no-inline-sqrt): New option.
+	(TARGET_DEFAULT): Add MASK_INLINE_FLOAT_DIV_THR to define.
+	* config/ia64/hpux.h (TARGET_DEFAULT): Ditto.
+	* config/ia64/ia64.c (ia64_override_options): Modify error
+	checking for inlined division/sqrt.
+
 2004-02-27  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* bb-reorder.c, cfgbuild.c, diagnostic.c, explow.c, profile.c,

gcc/config/ia64/hpux.h

@@ -105,7 +105,8 @@ do {							\
 #define JMP_BUF_SIZE  (8 * 76)
 
 #undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_BIG_ENDIAN | MASK_ILP32)
+#define TARGET_DEFAULT \
+  (MASK_DWARF2_ASM | MASK_BIG_ENDIAN | MASK_ILP32 | MASK_INLINE_FLOAT_DIV_THR)
 
 /* This needs to be set to force structure arguments with a single
    field to be treated as structures and not as the type of their

gcc/config/ia64/ia64.c

@@ -4751,20 +4751,53 @@ ia64_override_options (void)
 
   if (TARGET_INLINE_FLOAT_DIV_LAT && TARGET_INLINE_FLOAT_DIV_THR)
     {
-      warning ("cannot optimize floating point division for both latency and throughput");
-      target_flags &= ~MASK_INLINE_FLOAT_DIV_THR;
+      if ((target_flags_explicit & MASK_INLINE_FLOAT_DIV_LAT)
+	   && (target_flags_explicit & MASK_INLINE_FLOAT_DIV_THR))
+	{
+	  warning ("cannot optimize floating point division for both latency and throughput");
+	  target_flags &= ~MASK_INLINE_FLOAT_DIV_THR;
+	}
+      else 
+	{
+	  if (target_flags_explicit & MASK_INLINE_FLOAT_DIV_THR)
+	    target_flags &= ~MASK_INLINE_FLOAT_DIV_LAT;
+	  else
+	    target_flags &= ~MASK_INLINE_FLOAT_DIV_THR;
+	}
     }
 
   if (TARGET_INLINE_INT_DIV_LAT && TARGET_INLINE_INT_DIV_THR)
     {
-      warning ("cannot optimize integer division for both latency and throughput");
-      target_flags &= ~MASK_INLINE_INT_DIV_THR;
+      if ((target_flags_explicit & MASK_INLINE_INT_DIV_LAT)
+	   && (target_flags_explicit & MASK_INLINE_INT_DIV_THR))
+	{
+	  warning ("cannot optimize integer division for both latency and throughput");
+	  target_flags &= ~MASK_INLINE_INT_DIV_THR;
+	}
+      else 
+	{
+	  if (target_flags_explicit & MASK_INLINE_INT_DIV_THR)
+	    target_flags &= ~MASK_INLINE_INT_DIV_LAT;
+	  else
+	    target_flags &= ~MASK_INLINE_INT_DIV_THR;
+	}
     }
 
   if (TARGET_INLINE_SQRT_LAT && TARGET_INLINE_SQRT_THR)
     {
-      warning ("cannot optimize square root for both latency and throughput");
-      target_flags &= ~MASK_INLINE_SQRT_THR;
+      if ((target_flags_explicit & MASK_INLINE_SQRT_LAT)
+	   && (target_flags_explicit & MASK_INLINE_SQRT_THR))
+	{
+	  warning ("cannot optimize square root for both latency and throughput");
+	  target_flags &= ~MASK_INLINE_SQRT_THR;
+	}
+      else 
+	{
+	  if (target_flags_explicit & MASK_INLINE_SQRT_THR)
+	    target_flags &= ~MASK_INLINE_SQRT_LAT;
+	  else
+	    target_flags &= ~MASK_INLINE_SQRT_THR;
+	}
     }
 
   if (TARGET_INLINE_SQRT_LAT)

gcc/config/ia64/ia64.h

@@ -203,14 +203,21 @@ extern int ia64_tls_size;
       N_("Generate inline floating point division, optimize for latency") },\
   { "inline-float-divide-max-throughput", MASK_INLINE_FLOAT_DIV_THR,	\
       N_("Generate inline floating point division, optimize for throughput") },\
+  { "no-inline-float-divide", 						\
+      -(MASK_INLINE_FLOAT_DIV_LAT|MASK_INLINE_FLOAT_DIV_THR),		\
+      N_("Do not inline floating point division") },			\
   { "inline-int-divide-min-latency", MASK_INLINE_INT_DIV_LAT,		\
       N_("Generate inline integer division, optimize for latency") },	\
   { "inline-int-divide-max-throughput", MASK_INLINE_INT_DIV_THR,	\
       N_("Generate inline integer division, optimize for throughput") },\
+  { "no-inline-int-divide", -(MASK_INLINE_INT_DIV_LAT|MASK_INLINE_INT_DIV_THR),	\
+      N_("Do not inline integer division") },				\
   { "inline-sqrt-min-latency", MASK_INLINE_SQRT_LAT,			\
       N_("Generate inline square root, optimize for latency") },	\
   { "inline-sqrt-max-throughput", MASK_INLINE_SQRT_THR,			\
       N_("Generate inline square root, optimize for throughput") },     \
+  { "no-inline-sqrt", -(MASK_INLINE_SQRT_LAT|MASK_INLINE_SQRT_THR),	\
+      N_("Do not inline square root") },				\
   { "dwarf2-asm", 	MASK_DWARF2_ASM,				\
       N_("Enable Dwarf 2 line debug info via GNU as")},			\
   { "no-dwarf2-asm", 	-MASK_DWARF2_ASM,				\
@@ -227,7 +234,7 @@ extern int ia64_tls_size;
 /* Default target_flags if no switches are specified  */
 
 #ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT MASK_DWARF2_ASM
+#define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_INLINE_FLOAT_DIV_THR)
 #endif
 
 #ifndef TARGET_CPU_DEFAULT