invoke.texi (RS/6000 and PowerPC Options): Add -mcmpb and -mdfp.

	* doc/invoke.texi (RS/6000 and PowerPC Options): Add -mcmpb and -mdfp.
	* configure.ac (HAVE_GAS_CMPB): Check for assembler support of the
	cmpb instruction.
	(HAVE_GAS_DFP): Check for assembler support of decimal floating
	point instructions.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/rs6000/rs6000.opt (mcmpb, mdfp): New.
	* config/rs6000/rs6000.c (rs6000_override_options): Add CMPB and DFP
	masks to power6 and power6x and to POWERPC_MASKS.
	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
	_ARCH_PWR6.
	* config/rs6000/rs6000.h: Check assembler support for CMPB and DFP.
	* config/rs6000/sysv4.opt (mprototype): Use variable, not mask.
	* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS):
	Access PROTOTYPE as variable, not mask.

From-SVN: r122179

gcc/ChangeLog

+2007-02-20  Janis Johnson  <janis187@us.ibm.com>
+
+	* doc/invoke.texi (RS/6000 and PowerPC Options): Add -mcmpb and -mdfp.
+	* configure.ac (HAVE_GAS_CMPB): Check for assembler support of the
+	cmpb instruction.
+	(HAVE_GAS_DFP): Check for assembler support of decimal floating
+	point instructions.
+	* configure: Regenerate.
+	* config.in: Regenerate.
+	* config/rs6000/rs6000.opt (mcmpb, mdfp): New.
+	* config/rs6000/rs6000.c (rs6000_override_options): Add CMPB and DFP
+	masks to power6 and power6x and to POWERPC_MASKS.
+	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
+	_ARCH_PWR6.
+	* config/rs6000/rs6000.h: Check assembler support for CMPB and DFP.
+	* config/rs6000/sysv4.opt (mprototype): Use variable, not mask.
+	* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS):
+	Access PROTOTYPE as variable, not mask.
+
 2007-02-20  Steven Bosscher  <steven@gcc.gnu.org>
 
 	* rtl.h (remove_reg_equal_equiv_notes): New prototype.

gcc/config.in

@@ -160,6 +160,18 @@
 #endif
 
 
+/* Define if your assembler supports cmpb. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_CMPB
+#endif
+
+
+/* Define if your assembler supports DFP instructions. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_DFP
+#endif
+
+
 /* Define if your assembler supports dwarf2 .file/.loc directives, and
    preserves file table indices exactly as given. */
 #ifndef USED_FOR_TARGET

gcc/config/rs6000/linux64.h

@@ -98,9 +98,9 @@ extern int dot_symbols;
 	      target_flags &= ~MASK_EABI;			\
 	      error (INVALID_64BIT, "eabi");			\
 	    }							\
-	  if (target_flags & MASK_PROTOTYPE)			\
+	  if (TARGET_PROTOTYPE)					\
 	    {							\
-	      target_flags &= ~MASK_PROTOTYPE;			\
+	      TARGET_PROTOTYPE = 0;				\
 	      error (INVALID_64BIT, "prototype");		\
 	    }							\
 	  if ((target_flags & MASK_POWERPC64) == 0)		\

gcc/config/rs6000/rs6000-c.c

@@ -106,6 +106,8 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
     builtin_define ("_ARCH_PWR5");
   if (TARGET_FPRND)
     builtin_define ("_ARCH_PWR5X");
+  if (TARGET_CMPB)
+    builtin_define ("_ARCH_PWR6");
   if (TARGET_MFPGPR)
     builtin_define ("_ARCH_PWR6X");
   if (! TARGET_POWER && ! TARGET_POWER2 && ! TARGET_POWERPC)

gcc/config/rs6000/rs6000.c

@@ -1323,10 +1323,10 @@ rs6000_override_options (const char *default_cpu)
 	  | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND},
  	 {"power6", PROCESSOR_POWER6,
 	  POWERPC_7400_MASK | MASK_POWERPC64 | MASK_MFCRF | MASK_POPCNTB
-	  | MASK_FPRND},
+	  | MASK_FPRND | MASK_CMPB | MASK_DFP },
 	 {"power6x", PROCESSOR_POWER6,
 	  POWERPC_7400_MASK | MASK_POWERPC64 | MASK_MFCRF | MASK_POPCNTB
-	  | MASK_FPRND | MASK_MFPGPR},
+	  | MASK_FPRND | MASK_CMPB | MASK_MFPGPR | MASK_DFP },
 	 {"powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK},
 	 {"powerpc64", PROCESSOR_POWERPC64,
 	  POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
@@ -1353,7 +1353,7 @@ rs6000_override_options (const char *default_cpu)
     POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT | MASK_STRICT_ALIGN
 		     | MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_ALTIVEC
 		     | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_MULHW
-		     | MASK_DLMZB | MASK_MFPGPR)
+		     | MASK_DLMZB | MASK_CMPB | MASK_MFPGPR | MASK_DFP)
   };
 
   rs6000_init_hard_regno_mode_ok ();

gcc/config/rs6000/rs6000.h

@@ -164,6 +164,14 @@
 #define TARGET_FPRND 0
 #endif
 
+/* Define TARGET_CMPB if the target assembler does not support the
+   cmpb instruction.  */
+
+#ifndef HAVE_AS_CMPB
+#undef  TARGET_CMPB
+#define TARGET_CMPB 0
+#endif
+
 /* Define TARGET_MFPGPR if the target assembler does not support the
    mffpr and mftgpr instructions. */
 
@@ -172,6 +180,13 @@
 #define TARGET_MFPGPR 0
 #endif
 
+/* Define TARGET_DFP if the target assembler does not support decimal
+   floating point instructions.  */
+#ifndef HAVE_AS_DFP
+#undef  TARGET_DFP
+#define TARGET_DFP 0
+#endif
+
 #ifndef TARGET_SECURE_PLT
 #define TARGET_SECURE_PLT 0
 #endif

gcc/config/rs6000/rs6000.opt

 ; Options for the rs6000 port of the compiler
 ;
-; Copyright (C) 2005 Free Software Foundation, Inc.
+; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
 ;
 ; This file is part of GCC.
@@ -64,6 +64,10 @@ mfprnd
 Target Report Mask(FPRND)
 Use PowerPC V2.02 floating point rounding instructions
 
+mcmpb
+Target Report Mask(CMPB)
+Use PowerPC V2.05 compare bytes instruction
+
 mmfpgpr
 Target Report Mask(MFPGPR)
 Use extended PowerPC V2.05 move floating point to/from GPR instructions
@@ -72,6 +76,10 @@ maltivec
 Target Report Mask(ALTIVEC)
 Use AltiVec instructions
 
+mdfp
+Target Report Mask(DFP)
+Use decimal floating point instructions
+
 mmulhw
 Target Report Mask(MULHW)
 Use 4xx half-word multiply instructions

gcc/config/rs6000/sysv4.opt

@@ -75,7 +75,7 @@ Target RejectNegative
 no description yet
 
 mprototype
-Target Mask(PROTOTYPE)
+Target Var(TARGET_PROTOTYPE)
 Assume all variable arg functions are prototyped
 
 ;; FIXME: Does nothing.

gcc/configure.ac

@@ -2925,6 +2925,36 @@ LCF0:
 	addis 11,30,_GLOBAL_OFFSET_TABLE_-.LCF0@ha';;
     esac
 
+    case $target in
+      *-*-aix*) conftest_s='	.machine "pwr6"
+	.csect .text[[PR]]
+	cmpb 3,4,5';;
+      *) conftest_s='	.machine power6
+	.text
+	cmpb 3,4,5';;
+    esac
+
+    gcc_GAS_CHECK_FEATURE([compare bytes support],
+      gcc_cv_as_powerpc_cmpb, [9,99,0], -a32,
+      [$conftest_s],,
+      [AC_DEFINE(HAVE_AS_CMPB, 1,
+	  [Define if your assembler supports cmpb.])])
+
+    case $target in
+      *-*-aix*) conftest_s='	.machine "pwr6"
+	.csect .text[[PR]]
+	dadd 1,3';;
+      *) conftest_s='	.machine power6
+	.text
+	dadd 1,3';;
+    esac
+
+    gcc_GAS_CHECK_FEATURE([decimal float support],
+      gcc_cv_as_powerpc_dfp, [9,99,0], -a32,
+      [$conftest_s],,
+      [AC_DEFINE(HAVE_AS_DFP, 1,
+	  [Define if your assembler supports DFP instructions.])])
+
     gcc_GAS_CHECK_FEATURE([rel16 relocs],
       gcc_cv_as_powerpc_rel16, [2,17,0], -a32,
       [$conftest_s],,

gcc/doc/invoke.texi

@@ -664,7 +664,7 @@ See RS/6000 and PowerPC Options.
 -mpowerpc-gpopt  -mno-powerpc-gpopt @gol
 -mpowerpc-gfxopt  -mno-powerpc-gfxopt @gol
 -mmfcrf  -mno-mfcrf  -mpopcntb  -mno-popcntb  -mfprnd  -mno-fprnd @gol
--mmfpgpr -mno-mfpgpr @gol
+-mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mdfp -mno-dfp @gol
 -mnew-mnemonics  -mold-mnemonics @gol
 -mfull-toc   -mminimal-toc  -mno-fp-in-toc  -mno-sum-in-toc @gol
 -m64  -m32  -mxl-compat  -mno-xl-compat  -mpe @gol
@@ -11799,8 +11799,12 @@ These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
 @itemx -mno-popcntb
 @itemx -mfprnd
 @itemx -mno-fprnd
+@itemx -mcmpb
+@itemx -mno-cmpb
 @itemx -mmfpgpr
 @itemx -mno-mfpgpr
+@itemx -mdfp
+@itemx -mno-dfp
 @opindex mpower
 @opindex mno-power
 @opindex mpower2
@@ -11819,8 +11823,12 @@ These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
 @opindex mno-popcntb
 @opindex mfprnd
 @opindex mno-fprnd
+@opindex mcmpb
+@opindex mno-cmpb
 @opindex mmfpgpr
 @opindex mno-mfpgpr
+@opindex mdfp
+@opindex mno-dfp
 GCC supports two related instruction set architectures for the
 RS/6000 and PowerPC@.  The @dfn{POWER} instruction set are those
 instructions supported by the @samp{rios} chip set used in the original
@@ -11865,10 +11873,15 @@ architecture.
 The @option{-mfprnd} option allows GCC to generate the FP round to
 integer instructions implemented on the POWER5+ processor and other
 processors that support the PowerPC V2.03 architecture.
+The @option{-mcmpb} option allows GCC to generate the compare bytes
+instruction implemented on the POWER6 processor and other processors
+that support the PowerPC V2.05 architecture.
 The @option{-mmfpgpr} option allows GCC to generate the FP move to/from
 general purpose register instructions implemented on the POWER6X
 processor and other processors that support the extended PowerPC V2.05
 architecture.
+The @option{-mdfp} option allows GCC to generate the decimal floating
+point instructions implemented on some POWER processors.
 
 The @option{-mpowerpc64} option allows GCC to generate the additional
 64-bit instructions that are found in the full PowerPC64 architecture