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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
b58f0de1
Commit
b58f0de1
authored
Nov 17, 1994
by
Richard Kenner
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(addsi3, adddi3): For patterns valid only during reload, allow operand
1 to be `some_operand'. From-SVN: r8483
parent
4e26af5f
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gcc/config/alpha/alpha.md
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gcc/config/alpha/alpha.md
View file @
b58f0de1
...
@@ -295,7 +295,7 @@
...
@@ -295,7 +295,7 @@
(define_insn ""
(define_insn ""
[
(set (match_operand:SI 0 "register_operand" "=&r")
[
(set (match_operand:SI 0 "register_operand" "=&r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "
reg_or_0
_operand" "rJ")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "
some
_operand" "rJ")
(match_operand:SI 2 "const48_operand" "I"))
(match_operand:SI 2 "const48_operand" "I"))
(match_operand:SI 3 "register_operand" "r"))
(match_operand:SI 3 "register_operand" "r"))
(match_operand:SI 4 "add_operand" "rIOKL")))]
(match_operand:SI 4 "add_operand" "rIOKL")))]
...
@@ -319,7 +319,7 @@
...
@@ -319,7 +319,7 @@
[
(set (match_operand:DI 0 "register_operand" "=&r")
[
(set (match_operand:DI 0 "register_operand" "=&r")
(sign_extend:DI
(sign_extend:DI
(plus:SI (plus:SI
(plus:SI (plus:SI
(mult:SI (match_operand:SI 1 "
reg_or_0
_operand" "rJ")
(mult:SI (match_operand:SI 1 "
some
_operand" "rJ")
(match_operand:SI 2 "const48_operand" "I"))
(match_operand:SI 2 "const48_operand" "I"))
(match_operand:SI 3 "register_operand" "r"))
(match_operand:SI 3 "register_operand" "r"))
(match_operand:SI 4 "add_operand" "rIOKL"))))]
(match_operand:SI 4 "add_operand" "rIOKL"))))]
...
@@ -345,7 +345,7 @@
...
@@ -345,7 +345,7 @@
(define_insn ""
(define_insn ""
[
(set (match_operand:DI 0 "register_operand" "=&r")
[
(set (match_operand:DI 0 "register_operand" "=&r")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "
reg_or_0
_operand" "rJ")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "
some
_operand" "rJ")
(match_operand:DI 2 "const48_operand" "I"))
(match_operand:DI 2 "const48_operand" "I"))
(match_operand:DI 3 "register_operand" "r"))
(match_operand:DI 3 "register_operand" "r"))
(match_operand:DI 4 "add_operand" "rIOKL")))]
(match_operand:DI 4 "add_operand" "rIOKL")))]
...
...
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