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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
b4f1aa7a
Commit
b4f1aa7a
authored
May 04, 1994
by
Jim Wilson
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(override_options): Delete TARGET_LLONG128 references.
From-SVN: r7207
parent
923d630e
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gcc/config/mips/mips.c
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b4f1aa7a
...
...
@@ -3177,20 +3177,12 @@ override_options ()
else
if
(
TARGET_LONG64
)
fatal
(
"Only MIPS-III CPUs can support 64 bit longs"
);
else
if
(
TARGET_LLONG128
)
fatal
(
"Only MIPS-III CPUs can support 128 bit long longs"
);
else
if
(
TARGET_FLOAT64
)
fatal
(
"Only MIPS-III CPUs can support 64 bit fp registers"
);
else
if
(
TARGET_64BIT
)
fatal
(
"Only MIPS-III CPUs can support 64 bit gp registers"
);
}
else
{
if
(
TARGET_LLONG128
)
fatal
(
"128 bit long longs are not supported"
);
}
/* Tell halfpic.c that we have half-pic code if we do. */
if
(
TARGET_HALF_PIC
)
...
...
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