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Commit b49ae8a5 by Uros Bizjak Committed by Uros Bizjak
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i386.md (mmx_isa): Rename x64, x64_noavx and x64_avx to sse, sse_noavx and avx. 

	* config/i386/i386.md (mmx_isa): Rename x64, x64_noavx and x64_avx
	to sse, sse_noavx and avx.  Update all uses.

	* config/i386/mmx.md (sse_movntq): Add "isa" attribute.
	(*mmx_<plusminus_insn><mode>3): Ditto.
	(*mmx_mulv4hi3"): Ditto.
	(*mmx_smulv4hi3_highpart): Ditto.
	(*mmx_umulv4hi3_highpart): Ditto.
	(*mmx_pmaddwd): Ditto.
	(*sse2_umulv1siv1di3): Ditto.
	(*mmx_<code>v4hi3): Ditto.
	(*mmx_<code>v8qi3): Ditto.
	(mmx_ashr<mode>3): Ditto.
	("mmx_<shift_insn><mode>3): Ditto.
	(*mmx_eq<mode>3): Ditto.
	(mmx_gt<mode>3): Ditto.
	(mmx_andnot<mode>3): Ditto.
	(*mmx_<code><mode>3): Ditto.
	(*mmx_pinsrw): Ditto.
	(*mmx_pextrw): Ditto.
	(mmx_pshufw_1): Ditto.
	(*mmx_uavgv8qi3): Ditto.
	(*mmx_uavgv4hi3): Ditto.
	("mmx_psadbw): Ditto.
	* config/i386/sse.md (sse_cvtps2pi): Ditto.
	(sse_cvttps2pi): Ditto.
	(ssse3_pmaddubsw): Ditto.
	(*ssse3_pmulhrswv4hi3): Ditto.
	(ssse3_psign<mode>3): Ditto.

From-SVN: r272834
parent b09e0af6
Showing with 55 additions and 16 deletions
gcc/ChangeLog
2019-06-30 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (mmx_isa): Rename x64, x64_noavx and x64_avx
to sse, sse_noavx and avx. Update all uses.
2019-06-30 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/mmx.md (sse_movntq): Add "isa" attribute.
(*mmx_<plusminus_insn><mode>3): Ditto.
(*mmx_mulv4hi3"): Ditto.
(*mmx_smulv4hi3_highpart): Ditto.
(*mmx_umulv4hi3_highpart): Ditto.
(*mmx_pmaddwd): Ditto.
(*sse2_umulv1siv1di3): Ditto.
(*mmx_<code>v4hi3): Ditto.
(*mmx_<code>v8qi3): Ditto.
(mmx_ashr<mode>3): Ditto.
("mmx_<shift_insn><mode>3): Ditto.
(*mmx_eq<mode>3): Ditto.
(mmx_gt<mode>3): Ditto.
(mmx_andnot<mode>3): Ditto.
(*mmx_<code><mode>3): Ditto.
(*mmx_pinsrw): Ditto.
(*mmx_pextrw): Ditto.
(mmx_pshufw_1): Ditto.
(*mmx_uavgv8qi3): Ditto.
(*mmx_uavgv4hi3): Ditto.
("mmx_psadbw): Ditto.
* config/i386/sse.md (sse_cvtps2pi): Ditto.
(sse_cvttps2pi): Ditto.
(ssse3_pmaddubsw): Ditto.
(*ssse3_pmulhrswv4hi3): Ditto.
(ssse3_psign<mode>3): Ditto.
2019-06-29 Eric Botcazou <ebotcazou@adacore.com>
* expr.c (expand_expr_real_1) <BIT_FIELD_REF>: Apply the big-endian
......
gcc/config/i386/i386.md
......@@ -801,7 +801,7 @@
(const_string "base"))
;; Define instruction set of MMX instructions
(define_attr "mmx_isa" "base,native,x64,x64_noavx,x64_avx"
(define_attr "mmx_isa" "base,native,sse,sse_noavx,avx"
(const_string "base"))
(define_attr "enabled" ""
......@@ -845,12 +845,12 @@
(eq_attr "mmx_isa" "native")
(symbol_ref "!TARGET_MMX_WITH_SSE")
(eq_attr "mmx_isa" "x64")
(eq_attr "mmx_isa" "sse")
(symbol_ref "TARGET_MMX_WITH_SSE")
(eq_attr "mmx_isa" "x64_avx")
(symbol_ref "TARGET_MMX_WITH_SSE && TARGET_AVX")
(eq_attr "mmx_isa" "x64_noavx")
(eq_attr "mmx_isa" "sse_noavx")
(symbol_ref "TARGET_MMX_WITH_SSE && !TARGET_AVX")
(eq_attr "mmx_isa" "avx")
(symbol_ref "TARGET_MMX_WITH_SSE && TARGET_AVX")
]
(const_int 1)))
......
gcc/config/i386/sse.md
......@@ -5150,7 +5150,7 @@
}
DONE;
}
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "mmx_isa" "native,sse_noavx,avx")
(set_attr "type" "ssecvt")
(set_attr "mode" "V4SF")])
......@@ -5164,7 +5164,8 @@
"@
cvtps2pi\t{%1, %0|%0, %q1}
%vcvtps2dq\t{%1, %0|%0, %1}"
[(set_attr "mmx_isa" "native,x64")
[(set_attr "isa" "*,sse2")
(set_attr "mmx_isa" "native,*")
(set_attr "type" "ssecvt")
(set_attr "unit" "mmx,*")
(set_attr "mode" "DI")])
......@@ -5178,7 +5179,8 @@
"@
cvttps2pi\t{%1, %0|%0, %q1}
%vcvttps2dq\t{%1, %0|%0, %1}"
[(set_attr "mmx_isa" "native,x64")
[(set_attr "isa" "*,sse2")
(set_attr "mmx_isa" "native,*")
(set_attr "type" "ssecvt")
(set_attr "unit" "mmx,*")
(set_attr "prefix_rep" "0")
......@@ -15893,7 +15895,7 @@
ix86_move_vector_high_sse_to_mmx (op0);
DONE;
}
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "mmx_isa" "native,sse_noavx,avx")
(set_attr "type" "sseiadd")
(set_attr "atom_unit" "complex")
(set_attr "prefix_extra" "1")
......@@ -16009,7 +16011,7 @@
ix86_move_vector_high_sse_to_mmx (op0);
DONE;
}
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "mmx_isa" "native,sse_noavx,avx")
(set_attr "type" "sseiadd")
(set_attr "atom_unit" "complex")
(set_attr "prefix_extra" "1")
......@@ -16192,7 +16194,8 @@
pmaddubsw\t{%2, %0|%0, %2}
pmaddubsw\t{%2, %0|%0, %2}
vpmaddubsw\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "isa" "*,noavx,avx")
(set_attr "mmx_isa" "native,*,*")
(set_attr "type" "sseiadd")
(set_attr "atom_unit" "simul")
(set_attr "prefix_extra" "1")
......@@ -16313,7 +16316,8 @@
pmulhrsw\t{%2, %0|%0, %2}
pmulhrsw\t{%2, %0|%0, %2}
vpmulhrsw\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "isa" "*,noavx,avx")
(set_attr "mmx_isa" "native,*,*")
(set_attr "type" "sseimul")
(set_attr "prefix_extra" "1")
(set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
......@@ -16373,7 +16377,7 @@
rtx vec_const = gen_rtx_CONST_VECTOR (V4SImode, par);
operands[5] = force_const_mem (V4SImode, vec_const);
}
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "mmx_isa" "native,sse_noavx,avx")
(set_attr "prefix_extra" "1")
(set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
(set_attr "mode" "DI,TI,TI")])
......@@ -16406,7 +16410,8 @@
psign<mmxvecsize>\t{%2, %0|%0, %2}
psign<mmxvecsize>\t{%2, %0|%0, %2}
vpsign<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "isa" "*,noavx,avx")
(set_attr "mmx_isa" "native,*,*")
(set_attr "type" "sselog1")
(set_attr "prefix_extra" "1")
(set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
......@@ -16510,7 +16515,7 @@
}
operands[0] = lowpart_subreg (V1TImode, op0, GET_MODE (op0));
}
[(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
[(set_attr "mmx_isa" "native,sse_noavx,avx")
(set_attr "type" "sseishft")
(set_attr "atom_unit" "sishuf")
(set_attr "prefix_extra" "1")
......@@ -16587,7 +16592,7 @@
"@
pabs<mmxvecsize>\t{%1, %0|%0, %1}
%vpabs<mmxvecsize>\t{%1, %0|%0, %1}"
[(set_attr "mmx_isa" "native,x64")
[(set_attr "mmx_isa" "native,*")
(set_attr "type" "sselog1")
(set_attr "prefix_rep" "0")
(set_attr "prefix_extra" "1")
......
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