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Commit b37a5b97 by Carl Love Committed by Carl Love
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rs6000-c.c: Add built-in support for vector float vec_pack (vector double... 

gcc/ChangeLog:

2016-12-13  Carl Love  <cel@us.ibm.com>

   * config/rs6000/rs6000-c.c: Add built-in support for
   vector float vec_pack (vector double, vector double)
   vector double vec_sld (vector double, vector double)
   * config/rs6000/rs6000.c: Add icode check for vsldoi_v2df to allow
   4-bit unsigned literal.
   * config/rs6000/rs6000-builtin.def: Add definition for VSLDOI_2DF
   * doc/extend.texi: Update the built-in documentation file for the
   new powerpc vec_pack and vec_sld built-ins.

gcc/testsuite/ChangeLog:

2016-12-13 Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-3.c: Add new test of the test suite
	file.
	* gcc.target/powerpc/builtins-3-p8.c: Add new test of the test suite
	file.

From-SVN: r243612
parent 2f75d6eb
Showing with 44 additions and 2 deletions
gcc/ChangeLog
2016-12-13 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c: Add built-in support for
vector float vec_pack (vector double, vector double)
vector double vec_sld (vector double, vector double)
* config/rs6000/rs6000.c: Add icode check for vsldoi_v2df to allow
4-bit unsigned literal.
* config/rs6000/rs6000-builtin.def: Add definition for VSLDOI_2DF
* doc/extend.texi: Update the built-in documentation file for the
new powerpc vec_pack and vec_sld built-ins.
2016-12-13 Martin Liska <mliska@suse.cz>
* sanopt.c (sanopt_optimize_walker): Set contains_asan_mark.
gcc/config/rs6000/rs6000-builtin.def
......@@ -958,6 +958,7 @@ BU_ALTIVEC_3 (VSLDOI_16QI, "vsldoi_16qi", CONST, altivec_vsldoi_v16qi)
BU_ALTIVEC_3 (VSLDOI_8HI, "vsldoi_8hi", CONST, altivec_vsldoi_v8hi)
BU_ALTIVEC_3 (VSLDOI_4SI, "vsldoi_4si", CONST, altivec_vsldoi_v4si)
BU_ALTIVEC_3 (VSLDOI_4SF, "vsldoi_4sf", CONST, altivec_vsldoi_v4sf)
BU_ALTIVEC_3 (VSLDOI_2DF, "vsldoi_2df", CONST, altivec_vsldoi_v2df)
/* Altivec DST builtins. */
BU_ALTIVEC_D (DST, "dst", MISC, altivec_dst)
......
gcc/config/rs6000/rs6000-c.c
......@@ -2118,6 +2118,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
{ ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,
RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
......@@ -3193,6 +3195,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_NOT_OPAQUE },
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_NOT_OPAQUE },
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DF,
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_NOT_OPAQUE },
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF,
RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
......
gcc/config/rs6000/rs6000.c
......@@ -15105,6 +15105,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
with identical values. We'd never reach here at runtime in
this case. */
if (icode == CODE_FOR_altivec_vsldoi_v4sf
|| icode == CODE_FOR_altivec_vsldoi_v2df
|| icode == CODE_FOR_altivec_vsldoi_v4si
|| icode == CODE_FOR_altivec_vsldoi_v8hi
|| icode == CODE_FOR_altivec_vsldoi_v16qi)
gcc/doc/extend.texi
......@@ -16517,6 +16517,8 @@ vector unsigned char vec_vslb (vector unsigned char,
vector unsigned char);
vector float vec_sld (vector float, vector float, const int);
vector double vec_sld (vector double, vector double, const int);
vector signed int vec_sld (vector signed int,
vector signed int,
const int);
......@@ -17749,6 +17751,7 @@ vector int vec_pack (vector long long, vector long long);
vector unsigned int vec_pack (vector unsigned long long,
vector unsigned long long);
vector bool int vec_pack (vector bool long long, vector bool long long);
vector float vec_pack (vector double, vector double);
vector int vec_packs (vector long long, vector long long);
vector unsigned int vec_packs (vector unsigned long long,
......
gcc/testsuite/ChangeLog
2016-12-13 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3.c: Add new test of the test suite
file.
* gcc.target/powerpc/builtins-3-p8.c: Add new test of the test suite
file.
2016-12-13 Martin Liska <mliska@suse.cz>
PR tree-optimization/78428
......
gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
......@@ -10,8 +10,16 @@ test_eq_long_long (vector bool long long x, vector bool long long y)
return vec_cmpeq (x, y);
}
vector float
test_pack_float (vector double x, vector double y)
{
return vec_pack (x, y);
}
/* Expected test results:
test_eq_long_long 1 vcmpequd inst */
test_eq_long_long 1 vcmpequd inst
test_pack_float 1 vpkudum inst */
/* { dg-final { scan-assembler-times "vcmpequd" 1 } } */
/* { dg-final { scan-assembler-times "vpkudum" 1 } } */
gcc/testsuite/gcc.target/powerpc/builtins-3.c
......@@ -22,13 +22,20 @@ test_eq_int (vector bool int x, vector bool int y)
return vec_cmpeq (x, y);
}
vector double
test_shift_left_double (vector double x, vector double y)
{
return vec_sld (x, y, /* shift_by */ 10);
}
/* Expected test results:
test_eq_char 1 vcmpequb inst
test_eq_short 1 vcmpequh inst
test_eq_int 1 vcmpequw inst */
test_eq_int 1 vcmpequw inst
test_shift_left_double 1 vsldoi inst */
/* { dg-final { scan-assembler-times "vcmpequb" 1 } } */
/* { dg-final { scan-assembler-times "vcmpequh" 1 } } */
/* { dg-final { scan-assembler-times "vcmpequw" 1 } } */
/* { dg-final { scan-assembler-times "vsldoi" 1 } } */
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