Commit b33d65e3 by Jakub Jelinek

re PR c++/66676 (pragma omp simd aligned(x) results in "internal compiler error:…

re PR c++/66676 (pragma omp simd aligned(x) results in "internal compiler error: Segmentation fault")

	PR c++/66676
	PR ipa/89104
	* omp-simd-clone.c (simd_clone_clauses_extract)
	<case OMP_CLAUSE_ALIGNED>: Ignore clauses with NULL
	OMP_CLAUSE_ALIGNED_ALIGNMENT.

	* gcc.dg/gomp/pr89104.c: New test.

From-SVN: r268370
parent fddbc193
2019-01-29 Jakub Jelinek <jakub@redhat.com>
PR c++/66676
PR ipa/89104
* omp-simd-clone.c (simd_clone_clauses_extract)
<case OMP_CLAUSE_ALIGNED>: Ignore clauses with NULL
OMP_CLAUSE_ALIGNED_ALIGNMENT.
2019-01-29 Vineet Gupta <vgupta@synopsys.com> 2019-01-29 Vineet Gupta <vgupta@synopsys.com>
* gcc/config.gcc: Force .init_array for ARC. * config.gcc: Force .init_array for ARC.
2019-01-29 Richard Biener <rguenther@suse.de> 2019-01-29 Richard Biener <rguenther@suse.de>
...@@ -1863,20 +1871,20 @@ ...@@ -1863,20 +1871,20 @@
* config/aarch64/aarch64-option-extensions.def: Define * config/aarch64/aarch64-option-extensions.def: Define
AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres. AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
* gcc/config/aarch64/aarch64.h (AARCH64_FL_RNG): New. * config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New. (AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
(AARCH64_FL_PREDRES): New. (AARCH64_FL_PREDRES): New.
(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and (AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
AARCH64_FL_PREDRES by default. AARCH64_FL_PREDRES by default.
* gcc/doc/invoke.texi: Document rng, memtag, sb, ssbs and predres. * doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
2018-01-09 Sudakshina Das <sudi.das@arm.com> 2018-01-09 Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for * config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for
ARMv8.5-A. ARMv8.5-A.
* gcc/config/aarch64/aarch64.h (AARCH64_FL_V8_5): New. * config/aarch64/aarch64.h (AARCH64_FL_V8_5): New.
(AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New. (AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New.
* gcc/doc/invoke.texi: Document ARMv8.5-A. * doc/invoke.texi: Document ARMv8.5-A.
2019-01-09 Alejandro Martinez <alejandro.martinezvicente@arm.com> 2019-01-09 Alejandro Martinez <alejandro.martinezvicente@arm.com>
...@@ -2266,12 +2274,6 @@ ...@@ -2266,12 +2274,6 @@
* gdbinit.in: Turn off pagination for the skip commands, restore * gdbinit.in: Turn off pagination for the skip commands, restore
it to previous state afterwards. it to previous state afterwards.
2019-01-04 Sam Tebbs <sam.tebbs@arm.com>
PR gcc/87763
* gcc.target/aarch64/combine_bfxil.c: Change scan-assembler-times bfxil
count to 18.
2019-01-04 Jakub Jelinek <jakub@redhat.com> 2019-01-04 Jakub Jelinek <jakub@redhat.com>
PR target/88594 PR target/88594
......
...@@ -242,6 +242,10 @@ simd_clone_clauses_extract (struct cgraph_node *node, tree clauses, ...@@ -242,6 +242,10 @@ simd_clone_clauses_extract (struct cgraph_node *node, tree clauses,
} }
case OMP_CLAUSE_ALIGNED: case OMP_CLAUSE_ALIGNED:
{ {
/* Ignore aligned (x) for declare simd, for the ABI we really
need an alignment specified. */
if (OMP_CLAUSE_ALIGNED_ALIGNMENT (t) == NULL_TREE)
break;
tree decl = OMP_CLAUSE_DECL (t); tree decl = OMP_CLAUSE_DECL (t);
int argno = tree_to_uhwi (decl); int argno = tree_to_uhwi (decl);
clone_info->args[argno].alignment clone_info->args[argno].alignment
......
2019-01-29 Jakub Jelinek <jakub@redhat.com>
PR c++/66676
PR ipa/89104
* gcc.dg/gomp/pr89104.c: New test.
2019-01-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 2019-01-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* gdc.dg/pr89042a.d: Mark as compile test. * gdc.dg/pr89042a.d: Mark as compile test.
...@@ -1416,6 +1422,12 @@ ...@@ -1416,6 +1422,12 @@
PR c/88363 PR c/88363
* c-c++-common/attributes-4.c: New test. * c-c++-common/attributes-4.c: New test.
2019-01-04 Sam Tebbs <sam.tebbs@arm.com>
PR gcc/87763
* gcc.target/aarch64/combine_bfxil.c: Change scan-assembler-times bfxil
count to 18.
2019-01-04 Thomas Koenig <tkoenig@gcc.gnu.org> 2019-01-04 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/48543 PR fortran/48543
......
/* PR c++/66676 */
/* PR ipa/89104 */
/* { dg-do compile } */
/* { dg-options "-O2 -fopenmp-simd" } */
#pragma omp declare simd uniform (x) aligned (x)
int
foo (int *x, int y)
{
return x[y];
}
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