[AArch64][4/14] Create TARGET_FIX_ERR_A53_835769 and use that instead of aarch64_fix_a53_err835769

        * config/aarch64/aarch64.h (TARGET_FIX_ERR_A53_835769_DEFAULT): Always
        define to 0 or 1.
        (TARGET_FIX_ERR_A53_835769): New macro.
        * config/aarch64/aarch64.c (aarch64_override_options_internal): Remove
        handling of opts->x_aarch64_fix_a53_err835769.
        (aarch64_madd_needs_nop): Check for TARGET_FIX_ERR_A53_835769 rather
        than aarch64_fix_a53_err835769.
        * config/aarch64/aarch64-elf-raw.h: Update for above changes.
        * config/aarch64/aarch64-linux.h: Likewise.

From-SVN: r226556

gcc/ChangeLog

+2015-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64.h (TARGET_FIX_ERR_A53_835769_DEFAULT): Always
+	define to 0 or 1.
+	(TARGET_FIX_ERR_A53_835769): New macro.
+	* config/aarch64/aarch64.c (aarch64_override_options_internal): Remove
+	handling of opts->x_aarch64_fix_a53_err835769.
+	(aarch64_madd_needs_nop): Check for TARGET_FIX_ERR_A53_835769 rather
+	than aarch64_fix_a53_err835769.
+	* config/aarch64/aarch64-elf-raw.h: Update for above changes.
+	* config/aarch64/aarch64-linux.h: Likewise.
+
 2015-08-04  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.c (ix86_expand_int_movcc): Check result of

gcc/config/aarch64/aarch64-elf-raw.h

@@ -27,7 +27,7 @@
   " crtend%O%s crtn%O%s " \
   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
 
-#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
+#if TARGET_FIX_ERR_A53_835769_DEFAULT
 #define CA53_ERR_835769_SPEC \
   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
 #else

gcc/config/aarch64/aarch64-linux.h

@@ -45,7 +45,7 @@
    %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
    -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
 
-#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
+#if TARGET_FIX_ERR_A53_835769_DEFAULT
 #define CA53_ERR_835769_SPEC \
   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
 #else

gcc/config/aarch64/aarch64.c

@@ -7542,15 +7542,6 @@ aarch64_override_options_internal (struct gcc_options *opts)
   if (opts->x_flag_strict_volatile_bitfields < 0 && abi_version_at_least (2))
     opts->x_flag_strict_volatile_bitfields = 1;
 
-  if (opts->x_aarch64_fix_a53_err835769 == 2)
-    {
-#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
-      opts->x_aarch64_fix_a53_err835769 = 1;
-#else
-      opts->x_aarch64_fix_a53_err835769 = 0;
-#endif
-    }
-
   /* -mgeneral-regs-only sets a mask in target_flags, make sure that
      aarch64_isa_flags does not contain the FP/SIMD/Crypto feature flags
      in case some code tries reading aarch64_isa_flags directly to check if
@@ -8985,7 +8976,7 @@ aarch64_madd_needs_nop (rtx_insn* insn)
   rtx_insn *prev;
   rtx body;
 
-  if (!aarch64_fix_a53_err835769)
+  if (!TARGET_FIX_ERR_A53_835769)
     return false;
 
   if (recog_memoized (insn) < 0)

gcc/config/aarch64/aarch64.h

@@ -235,6 +235,20 @@ extern unsigned long aarch64_isa_flags;
 /* CRC instructions that can be enabled through +crc arch extension.  */
 #define TARGET_CRC32 (AARCH64_ISA_CRC)
 
+/* Make sure this is always defined so we don't have to check for ifdefs
+   but rather use normal ifs.  */
+#ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
+#define TARGET_FIX_ERR_A53_835769_DEFAULT 0
+#else
+#undef TARGET_FIX_ERR_A53_835769_DEFAULT
+#define TARGET_FIX_ERR_A53_835769_DEFAULT 1
+#endif
+
+/* Apply the workaround for Cortex-A53 erratum 835769.  */
+#define TARGET_FIX_ERR_A53_835769	\
+  ((aarch64_fix_a53_err835769 == 2)	\
+  ? TARGET_FIX_ERR_A53_835769_DEFAULT : aarch64_fix_a53_err835769)
+
 /* Standard register usage.  */
 
 /* 31 64-bit general purpose registers R0-R30: