mips.md (*mov<mode>_ra): Name previously unnamed MIPS16 $31 store insns.

	* config/mips/mips.md (*mov<mode>_ra): Name previously unnamed MIPS16
	$31 store insns.  Redefine using :GPR.

From-SVN: r86417

gcc/ChangeLog

 2004-08-23  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config/mips/mips.md (*mov<mode>_ra): Name previously unnamed MIPS16
+	$31 store insns.  Redefine using :GPR.
+
+2004-08-23  Richard Sandiford  <rsandifo@redhat.com>
+
 	* config/mips/mips.md (P): New mode macro.
 	(*xgot_hi[sd]i, *xgot_lo[sd]i, *got_disp[sd]i, *got_page[sd]i)
 	(*load_got[sd]i, *low[sd]i, *low[sd]i_mips16): Redefine using :P.

gcc/config/mips/mips.md

@@ -3432,13 +3432,13 @@ beq\t%2,%.,1b\;\
 ;; memory, since we don't have a constraint to match $31.  This
 ;; instruction can be generated by save_restore_insns.
 
-(define_insn ""
-  [(set (match_operand:DI 0 "stack_operand" "=m")
-	(reg:DI 31))]
-  "TARGET_MIPS16 && TARGET_64BIT"
-  "sd\t$31,%0"
-  [(set_attr "type"	"store")
-   (set_attr "mode"	"DI")])
+(define_insn "*mov<mode>_ra"
+  [(set (match_operand:GPR 0 "stack_operand" "=m")
+	(reg:GPR 31))]
+  "TARGET_MIPS16"
+  "<store>\t$31,%0"
+  [(set_attr "type" "store")
+   (set_attr "mode" "<MODE>")])
 
 (define_insn "*movdi_32bit"
   [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,m,*x,*d,*B*C*D,*B*C*D,*d,*m")
@@ -3555,16 +3555,6 @@ beq\t%2,%.,1b\;\
     DONE;
 })
 
-;; We can only store $ra directly into a small sp offset.
-
-(define_insn ""
-  [(set (match_operand:SI 0 "stack_operand" "=m")
-	(reg:SI 31))]
-  "TARGET_MIPS16"
-  "sw\t$31,%0"
-  [(set_attr "type"	"store")
-   (set_attr "mode"	"SI")])
-
 ;; The difference between these two is whether or not ints are allowed
 ;; in FP registers (off by default, use -mdebugh to enable).