Skip to content

R
riscv-gcc-1
Commit b197fc48 by Uros Bizjak
Options

i386.h (LIMIT_RELOAD_CLASS): Return preferred single unit register class for… 

i386.h (LIMIT_RELOAD_CLASS): Return preferred single unit register class for classes that contain registers...

	* config/i386/i386.h (LIMIT_RELOAD_CLASS): Return preferred
	single unit register class for classes that contain registers form
	multiple units.
	(REG_CLASS_CONTENTS): Add missing "frame" register to FLOAT_INT_REGS,
	INT_SSE_REGS and FLOAT_INT_SSE_REGS register classes.

testsuite/ChangeLog:

	* gcc.c-torture/compile/20120727-1.c (dg-options): Add -mfpmath=387
	for x86 targets.
	* gcc.c-torture/compile/20120727-2.c: New test.

From-SVN: r190261
parent 8b7773a4
Showing with 59 additions and 18 deletions
gcc/ChangeLog
2012-08-09 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.h (LIMIT_RELOAD_CLASS): Return preferred
single unit register class for classes that contain registers form
multiple units.
(REG_CLASS_CONTENTS): Add missing "frame" register to FLOAT_INT_REGS,
INT_SSE_REGS and FLOAT_INT_SSE_REGS register classes.
2012-08-09 Martin Jambor <mjambor@suse.cz>
* cgraph.h (cgraph_indirect_call_info): Field anc_offse renamd to
......@@ -36,8 +44,7 @@
preserved.
(compute_complex_ancestor_jump_func): Likewise.
(compute_scalar_jump_functions): Removed.
(type_like_member_ptr_p): Also check field position are known and
sane.
(type_like_member_ptr_p): Also check field position are known and sane.
(compute_pass_through_member_ptrs): Removed.
(determine_cst_member_ptr): Likewise.
(ipa_known_agg_contents_list): New type.
......@@ -80,7 +87,8 @@
* config/sh/sync.md (atomic_test_and_set): Pass gen_t_reg_rtx to
gen_movnegt.
* config/sh/sh.c (expand_cbranchsi4, sh_emit_scc_to_t,
sh_emit_compare_and_branch, sh_emit_compare_and_set): Use get_t_reg_rtx.
sh_emit_compare_and_branch, sh_emit_compare_and_set): Use
get_t_reg_rtx.
(sh_expand_t_scc): Pass gen_t_reg_rtx to gen_movnegt.
2012-08-09 Oleg Endo <olegendo@gcc.gnu.org>
......
gcc/config/i386/i386.h
......@@ -1298,9 +1298,9 @@ enum reg_class
{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \
{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \
{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \
{ 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \
{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \
{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \
{ 0x11ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \
{ 0x1ff100ff,0x1fffe0 }, /* INT_SSE_REGS */ \
{ 0x1ff1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \
{ 0xffffffff,0x1fffff } \
}
......@@ -1378,14 +1378,27 @@ enum reg_class
/* Place additional restrictions on the register class to use when it
is necessary to be able to hold a value of mode MODE in a reload
register for which class CLASS would ordinarily be used. */
#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
((MODE) == QImode && !TARGET_64BIT \
&& ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \
|| (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \
? Q_REGS \
: (CLASS) == INT_SSE_REGS ? GENERAL_REGS : (CLASS))
register for which class CLASS would ordinarily be used.
We avoid classes containing registers from multiple units due to
the limitation in ix86_secondary_memory_needed. We limit these
classes to their "natural mode" single unit register class, depending
on the unit availability.
Please note that reg_class_subset_p is not commutative, so these
conditions mean "... if (CLASS) includes ALL registers from the
register set." */
#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
(((MODE) == QImode && !TARGET_64BIT \
&& reg_class_subset_p (Q_REGS, (CLASS))) ? Q_REGS \
: (((MODE) == SImode || (MODE) == DImode) \
&& reg_class_subset_p (GENERAL_REGS, (CLASS))) ? GENERAL_REGS \
: (SSE_FLOAT_MODE_P (MODE) && TARGET_SSE_MATH \
&& reg_class_subset_p (SSE_REGS, (CLASS))) ? SSE_REGS \
: (X87_FLOAT_MODE_P (MODE) \
&& reg_class_subset_p (FLOAT_REGS, (CLASS))) ? FLOAT_REGS \
: (CLASS))
/* If we are copying between general and FP registers, we need a memory
location. The same is true for SSE and MMX registers. */
......
gcc/testsuite/ChangeLog
2012-08-09 Uros Bizjak <ubizjak@gmail.com>
* gcc.c-torture/compile/20120727-1.c (dg-options): Add -mfpmath=387
for x86 targets.
* gcc.c-torture/compile/20120727-2.c: New test.
2012-08-09 Martin Jambor <mjambor@suse.cz>
* gcc.dg/ipa/iinline-4.c: New test.
......@@ -26,7 +32,7 @@
2012-08-09 Andrey Belevantsev <abel@ispras.ru>
PR rtl-optimization/53701
* gcc.dg/pr53701.c: New test.
* gcc.dg/pr53701.c: New test.
2012-08-09 Bernd Schmidt <bernds@codesourcery.com>
......@@ -39,8 +45,7 @@
2012-08-08 H.J. Lu <hongjiu.lu@intel.com>
* gcc.dg/tree-ssa/slsr-30.c: Require non-ilp32. Remove
dg-skip-if.
* gcc.dg/tree-ssa/slsr-30.c: Require non-ilp32. Remove dg-skip-if.
2012-08-08 Joseph Myers <joseph@codesourcery.com>
......
gcc/testsuite/gcc.c-torture/compile/20120727-1.c
/* { dg-options "-mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
union {
char *p;
float f;
......@@ -7,5 +9,5 @@ void
f (void)
{
u.p = "";
u.f += 1.1;
u.f += 1.1f;
}
gcc/testsuite/gcc.c-torture/compile/20120727-2.c 0 → 100644
/* { dg-options "-mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
union {
char *p;
double d;
} u;
void
f (void)
{
u.p = "";
u.d += 1.1;
}
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment