Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
b099377f
Commit
b099377f
authored
Mar 01, 1995
by
Ian Lance Taylor
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Add cpp predefines for VxWorks, and default to -mca
From-SVN: r9102
parent
2038d7ef
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
31 additions
and
2 deletions
+31
-2
gcc/config/i960/vx960-coff.h
+31
-2
No files found.
gcc/config/i960/vx960-coff.h
View file @
b099377f
/* Definitions of target machine for GNU compiler. Vxworks i960 version.
Copyright (C) 1994 Free Software Foundation, Inc.
Copyright (C) 1994
, 1995
Free Software Foundation, Inc.
This file is part of GNU CC.
...
...
@@ -31,9 +31,38 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC ""
/* Predefine vxworks. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Di960 -Di80960 -DI960 -DI80960 -Dvxworks -Acpu(i960) -Amachine(i960)"
/* The VxWorks header files expect the compiler to define CPU to a
magic number. */
#undef CPP_SPEC
#define CPP_SPEC "%{mic*:-D__i960\
%{mka:-D__i960KA}%{mkb:-D__i960KB}\
%{msa:-D__i960SA}%{msb:-D__i960SB}\
%{mmc:-D__i960MC}\
%{mca:-D__i960CA}%{mcc:-D__i960CC}\
%{mcf:-D__i960CF}}\
%{mka:-D__i960KA__ -D__i960_KA__ %{!ansi:-DCPU=I960KA}}\
%{mkb:-D__i960KB__ -D__i960_KB__ %{!ansi:-DCPU=I960KB}}\
%{msa:-D__i960SA__ -D__i960_SA__}\
%{msb:-D__i960SB__ -D__i960_SB__}\
%{mmc:-D__i960MC__ -D__i960_MC__}\
%{mca:-D__i960CA__ -D__i960_CA__ %{!ansi:-DCPU=I960CA}}\
%{mcc:-D__i960CC__ -D__i960_CC__}\
%{mcf:-D__i960CF__ -D__i960_CF__}\
%{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:\
%{!mcc:%{!mcf:-D__i960_CA -D__i960CA__ %{!ansi:-DCPU=I960CA}\
%{mic*:-D__i960CA}}}}}}}}}"
/* Default to -mca. */
#undef CC1_SPEC
#define CC1_SPEC \
"%{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:%{!mcc:%{!mcf:-m
kb
}}}}}}}}\
"%{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:%{!mcc:%{!mcf:-m
ca
}}}}}}}}\
%{!gs*:%{!gc*:%{mbout:%{g*:-gstabs}}\
%{mcoff:%{g*:-gcoff}}\
%{!mbout:%{!mcoff:%{g*:-gcoff}}}}}"
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment