avr-protos.h (avr_output_bld): New.

	* config/avr/avr-protos.h (avr_output_bld): New.
	(out_shift_with_cnt): Add t_len argument.
	* config/avr/avr.c (avr_num_arg_regs): Remove -mpack-args.
	(output_movqi, output_movhi, output_movsisf): Optimize loading
	any constant with exactly one bit set to NO_LD_REGS.
	(out_shift_with_cnt): Optimize output code for size or speed,
	depending on optimize_size.  Handle small shift counts as well
	(if not hand-optimized in ?sh??i3_out).  Shifts can be done
	with or without a scratch register, with help of __tmp_reg__
	or __zero_reg__ if necessary.  Add T_LEN argument to pass the
	length of TEMPLATE in words, return total insn length in *LEN.
	(ashlqi3_out, ashrqi3_out, lshrqi3_out): Change all calls to
	out_shift_with_cnt to work with the above change.
	(ashlhi3_out, ashlsi3_out, ashrhi3_out, ashrsi3_out, lshrhi3_out,
	lshrsi3_out): Likewise.  Optimize more known shift count cases.
	Remove cases already well optimized in out_shift_with_cnt.
	(avr_output_bld): New function.
	* config/avr/avr.h (MASK_PACK_ARGS, TARGET_PACK_ARGS): Remove.
	(TARGET_SWITCHES): Remove -mpack-args backward compatibility.
	* config/avr/avr.md (*reload_inqi, *reload_inhi, *reload_insi):
	Add reload_completed to insn condition - only for peepholes.
	(ashlqi3, ashrqi3, lshrqi3): Correct insn length for shift counts
	in a register or memory.
	(ashlhi3, ashlsi3, ashrhi3, ashrsi3, lshrhi3, lshrsi3): Likewise.
	Do not require a scratch register.
	(*ashlhi3_const, *ashlsi3_const, *ashrhi3_const, *ashrsi3_const,
	*lshrhi3_const, *lshrsi3_const): New insns and matching peepholes.
	Optimize shifts by known count using a scratch register, but only
	if one is still available after register allocation.

From-SVN: r36963

gcc/ChangeLog

+2000-10-14  Marek Michalkiewicz  <marekm@linux.org.pl>
+
+	* config/avr/avr-protos.h (avr_output_bld): New.
+	(out_shift_with_cnt): Add t_len argument.
+	* config/avr/avr.c (avr_num_arg_regs): Remove -mpack-args.
+	(output_movqi, output_movhi, output_movsisf): Optimize loading
+	any constant with exactly one bit set to NO_LD_REGS.
+	(out_shift_with_cnt): Optimize output code for size or speed,
+	depending on optimize_size.  Handle small shift counts as well
+	(if not hand-optimized in ?sh??i3_out).  Shifts can be done
+	with or without a scratch register, with help of __tmp_reg__
+	or __zero_reg__ if necessary.  Add T_LEN argument to pass the
+	length of TEMPLATE in words, return total insn length in *LEN.
+	(ashlqi3_out, ashrqi3_out, lshrqi3_out): Change all calls to
+	out_shift_with_cnt to work with the above change.
+	(ashlhi3_out, ashlsi3_out, ashrhi3_out, ashrsi3_out, lshrhi3_out,
+	lshrsi3_out): Likewise.  Optimize more known shift count cases.
+	Remove cases already well optimized in out_shift_with_cnt.
+	(avr_output_bld): New function.
+	* config/avr/avr.h (MASK_PACK_ARGS, TARGET_PACK_ARGS): Remove.
+	(TARGET_SWITCHES): Remove -mpack-args backward compatibility.
+	* config/avr/avr.md (*reload_inqi, *reload_inhi, *reload_insi):
+	Add reload_completed to insn condition - only for peepholes.
+	(ashlqi3, ashrqi3, lshrqi3): Correct insn length for shift counts
+	in a register or memory.
+	(ashlhi3, ashlsi3, ashrhi3, ashrsi3, lshrhi3, lshrsi3): Likewise.
+	Do not require a scratch register.
+	(*ashlhi3_const, *ashlsi3_const, *ashrhi3_const, *ashrsi3_const,
+	*lshrhi3_const, *lshrsi3_const): New insns and matching peepholes.
+	Optimize shifts by known count using a scratch register, but only
+	if one is still available after register allocation.
+
 2000-10-20  J. David Anglin  <dave@hiauly1.hia.nrc.ca>
  
 	* t-vax: New file.  Don't build modules from libgcc1.c.

gcc/config/avr/avr-protos.h

@@ -109,6 +109,8 @@ extern const char * lshrqi3_out PARAMS ((rtx insn, rtx operands[], int *len));
 extern const char * lshrhi3_out PARAMS ((rtx insn, rtx operands[], int *len));
 extern const char * lshrsi3_out PARAMS ((rtx insn, rtx operands[], int *len));
 
+extern void avr_output_bld PARAMS ((rtx operands[], int bit_nr));
+
 extern enum reg_class preferred_reload_class PARAMS ((rtx x,
 						     enum reg_class class));
 extern int    avr_address_cost       PARAMS ((rtx x));
@@ -150,7 +152,8 @@ extern int    avr_simplify_comparision_p PARAMS ((enum machine_mode mode,
 extern RTX_CODE avr_normalize_condition  PARAMS ((RTX_CODE condition));
 extern int    compare_eq_p           PARAMS ((rtx insn));
 extern void   out_shift_with_cnt     PARAMS ((const char *template, rtx insn,
-					      rtx operands[], int *len));
+					      rtx operands[], int *len,
+					      int t_len));
 extern int    const_int_pow2_p       PARAMS ((rtx x));
 #endif /* RTX_CODE */
 

gcc/config/avr/avr.h

@@ -55,7 +55,6 @@ extern int target_flags;
 #define MASK_NO_INTERRUPTS	0x00020000
 #define MASK_CALL_PROLOGUES	0x00040000
 #define MASK_TINY_STACK		0x00080000
-#define MASK_PACK_ARGS		0x00100000
 
 #define TARGET_ORDER_1		(target_flags & MASK_ORDER_1)
 #define TARGET_ORDER_2		(target_flags & MASK_ORDER_2)
@@ -64,7 +63,6 @@ extern int target_flags;
 #define TARGET_INSN_SIZE_DUMP	(target_flags & MASK_INSN_SIZE_DUMP)
 #define TARGET_CALL_PROLOGUES	(target_flags & MASK_CALL_PROLOGUES)
 #define TARGET_TINY_STACK	(target_flags & MASK_TINY_STACK)
-#define TARGET_PACK_ARGS	(target_flags & MASK_PACK_ARGS)
 
 /* Dump each assembler insn's rtl into the output file.
    This is for debugging the compiler itself.  */
@@ -104,8 +102,6 @@ extern int target_flags;
     N_("Use subroutines for function prologue/epilogue") },		\
   { "tiny-stack", MASK_TINY_STACK,					\
     N_("Change only the low 8 bits of the stack pointer") },		\
-  { "pack-args", MASK_PACK_ARGS,					\
-    N_("Do not align function arguments on even numbered registers") },	\
   { "rtl", MASK_RTL_DUMP, NULL },					\
   { "size", MASK_INSN_SIZE_DUMP,					\
     N_("Output instruction sizes to the asm file") },			\