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riscv-gcc-1
Commit af9253a1 by Vladimir Makarov Committed by Vladimir Makarov
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tm.texi (IRA_COVER_CLASSES): Fix a typo. 

2008-09-05  Vladimir Makarov  <vmakarov@redhat.com>

	* doc/tm.texi (IRA_COVER_CLASSES): Fix a typo.

From-SVN: r140053
parent 6b8d9676
Showing with 6 additions and 2 deletions
gcc/ChangeLog
2008-09-04 Vladimir Makarov <vmakarov@redhat.com> 2008-09-05 Vladimir Makarov <vmakarov@redhat.com>
* doc/tm.texi (IRA_COVER_CLASSES): Fix a typo.
2008-09-05 Vladimir Makarov <vmakarov@redhat.com>
* ira-color.c (ira_fast_allocation): Permit global allocno * ira-color.c (ira_fast_allocation): Permit global allocno
allocation. allocation.
......
gcc/doc/tm.texi
...@@ -2830,7 +2830,7 @@ as below: ...@@ -2830,7 +2830,7 @@ as below:
The macro defines cover classes for the Integrated Register Allocator The macro defines cover classes for the Integrated Register Allocator
(@acronym{IRA}). Cover classes are a set of non-intersecting register (@acronym{IRA}). Cover classes are a set of non-intersecting register
classes covering all hard registers used for register allocation classes covering all hard registers used for register allocation
purposes. If a move between two registers in the same cover class are purposes. If a move between two registers in the same cover class is
possible, it should be cheaper than a load or store of the registers. possible, it should be cheaper than a load or store of the registers.
The macro value should be the initializer for an array of register The macro value should be the initializer for an array of register
class values, with @code{LIM_REG_CLASSES} used as the end marker. class values, with @code{LIM_REG_CLASSES} used as the end marker.
......
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