Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
af863030
Commit
af863030
authored
Oct 20, 2017
by
Jan Hubicka
Committed by
Jan Hubicka
Oct 20, 2017
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
* x86-tune-costs.h (intel_cost, generic_cost): Fix move costs.
From-SVN: r253958
parent
001cbba0
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
23 additions
and
19 deletions
+23
-19
gcc/ChangeLog
+4
-0
gcc/config/i386/x86-tune-costs.h
+19
-19
No files found.
gcc/ChangeLog
View file @
af863030
2017
-
10
-
20
Jan
Hubicka
<
hubicka
@
ucw
.
cz
>
*
x86
-
tune
-
costs
.
h
(
intel_cost
,
generic_cost
):
Fix
move
costs
.
2017
-
10
-
20
Jakub
Jelinek
<
jakub
@
redhat
.
com
>
2017
-
10
-
20
Jakub
Jelinek
<
jakub
@
redhat
.
com
>
*
config
/
i386
/
i386
.
md
(
isa
):
Remove
fma_avx512f
.
*
config
/
i386
/
i386
.
md
(
isa
):
Remove
fma_avx512f
.
gcc/config/i386/x86-tune-costs.h
View file @
af863030
...
@@ -2121,27 +2121,27 @@ struct processor_costs intel_cost = {
...
@@ -2121,27 +2121,27 @@ struct processor_costs intel_cost = {
COSTS_N_INSNS
(
1
),
/* cost of movzx */
COSTS_N_INSNS
(
1
),
/* cost of movzx */
8
,
/* "large" insn */
8
,
/* "large" insn */
17
,
/* MOVE_RATIO */
17
,
/* MOVE_RATIO */
4
,
/* cost for loading QImode using movzbl */
6
,
/* cost for loading QImode using movzbl */
{
4
,
4
,
4
},
/* cost of loading integer registers
{
4
,
4
,
4
},
/* cost of loading integer registers
in QImode, HImode and SImode.
in QImode, HImode and SImode.
Relative to reg-reg move (2). */
Relative to reg-reg move (2). */
{
4
,
4
,
4
},
/* cost of storing integer registers */
{
6
,
6
,
6
},
/* cost of storing integer registers */
4
,
/* cost of reg,reg fld/fst */
2
,
/* cost of reg,reg fld/fst */
{
12
,
12
,
12
},
/* cost of loading fp registers
{
6
,
6
,
8
},
/* cost of loading fp registers
in SFmode, DFmode and XFmode */
in SFmode, DFmode and XFmode */
{
6
,
6
,
8
},
/* cost of storing fp registers
{
6
,
6
,
10
},
/* cost of storing fp registers
in SFmode, DFmode and XFmode */
in SFmode, DFmode and XFmode */
2
,
/* cost of moving MMX register */
2
,
/* cost of moving MMX register */
{
8
,
8
},
/* cost of loading MMX registers
{
6
,
6
},
/* cost of loading MMX registers
in SImode and DImode */
in SImode and DImode */
{
8
,
8
},
/* cost of storing MMX registers
{
6
,
6
},
/* cost of storing MMX registers
in SImode and DImode */
in SImode and DImode */
2
,
/* cost of moving SSE register */
2
,
/* cost of moving SSE register */
{
8
,
8
,
8
},
/* cost of loading SSE registers
{
6
,
6
,
6
},
/* cost of loading SSE registers
in SImode, DImode and TImode */
in SImode, DImode and TImode */
{
8
,
8
,
8
},
/* cost of storing SSE registers
{
6
,
6
,
6
},
/* cost of storing SSE registers
in SImode, DImode and TImode */
in SImode, DImode and TImode */
5
,
/* MMX or SSE register to integer */
2
,
/* MMX or SSE register to integer */
32
,
/* size of l1 cache. */
32
,
/* size of l1 cache. */
256
,
/* size of l2 cache. */
256
,
/* size of l2 cache. */
64
,
/* size of prefetch block */
64
,
/* size of prefetch block */
...
@@ -2221,23 +2221,23 @@ struct processor_costs generic_cost = {
...
@@ -2221,23 +2221,23 @@ struct processor_costs generic_cost = {
{
4
,
4
,
4
},
/* cost of loading integer registers
{
4
,
4
,
4
},
/* cost of loading integer registers
in QImode, HImode and SImode.
in QImode, HImode and SImode.
Relative to reg-reg move (2). */
Relative to reg-reg move (2). */
{
4
,
4
,
4
},
/* cost of storing integer registers */
{
6
,
6
,
6
},
/* cost of storing integer registers */
4
,
/* cost of reg,reg fld/fst */
4
,
/* cost of reg,reg fld/fst */
{
12
,
12
,
12
},
/* cost of loading fp registers
{
6
,
6
,
12
},
/* cost of loading fp registers
in SFmode, DFmode and XFmode */
in SFmode, DFmode and XFmode */
{
6
,
6
,
8
},
/* cost of storing fp registers
{
6
,
6
,
12
},
/* cost of storing fp registers
in SFmode, DFmode and XFmode */
in SFmode, DFmode and XFmode */
2
,
/* cost of moving MMX register */
2
,
/* cost of moving MMX register */
{
8
,
8
},
/* cost of loading MMX registers
{
6
,
6
},
/* cost of loading MMX registers
in SImode and DImode */
in SImode and DImode */
{
8
,
8
},
/* cost of storing MMX registers
{
6
,
6
},
/* cost of storing MMX registers
in SImode and DImode */
in SImode and DImode */
2
,
/* cost of moving SSE register */
2
,
/* cost of moving SSE register */
{
8
,
8
,
8
},
/* cost of loading SSE registers
{
6
,
6
,
6
},
/* cost of loading SSE registers
in SImode, DImode and TImode */
in SImode, DImode and TImode */
{
8
,
8
,
8
},
/* cost of storing SSE registers
{
6
,
6
,
6
},
/* cost of storing SSE registers
in SImode, DImode and TImode */
in SImode, DImode and TImode */
5
,
/* MMX or SSE register to integer */
6
,
/* MMX or SSE register to integer */
32
,
/* size of l1 cache. */
32
,
/* size of l1 cache. */
512
,
/* size of l2 cache. */
512
,
/* size of l2 cache. */
64
,
/* size of prefetch block */
64
,
/* size of prefetch block */
...
@@ -2326,7 +2326,7 @@ struct processor_costs core_cost = {
...
@@ -2326,7 +2326,7 @@ struct processor_costs core_cost = {
2
,
/* cost of reg,reg fld/fst */
2
,
/* cost of reg,reg fld/fst */
{
6
,
6
,
8
},
/* cost of loading fp registers
{
6
,
6
,
8
},
/* cost of loading fp registers
in SFmode, DFmode and XFmode */
in SFmode, DFmode and XFmode */
{
8
,
6
,
10
},
/* cost of storing fp registers
{
6
,
6
,
10
},
/* cost of storing fp registers
in SFmode, DFmode and XFmode */
in SFmode, DFmode and XFmode */
2
,
/* cost of moving MMX register */
2
,
/* cost of moving MMX register */
{
6
,
6
},
/* cost of loading MMX registers
{
6
,
6
},
/* cost of loading MMX registers
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment